公开(公告)号：US09488692B2

公开(公告)日：2016-11-08

申请号：US14468394

申请日：2014-08-26

Applicant: Apple Inc.

Inventor： Asad A. Bawa ,  Benjamin A. Marrou ,  Christopher Ng ,  Michael R. Seningen ,  Mihir S. Sabnis ,  Zameeruddin Mohammed ,  Yi Zhao

IPC: G01R31/3185 ,  G01R31/3177

CPC classification number: G01R31/318552 ,  G01R31/3177 ,  G01R31/318541 ,  G01R31/318563 ,  G01R31/318575

Abstract: A method and apparatus for implementing mode based skew is disclosed. In one embodiment, an IC includes a number of different functional units each coupled to receive a respective one of a number of different clock signals. One or more of the functional circuit blocks includes at least two clock-gating circuits that are coupled to receive the clock signal provided to that functional circuit block. During a scan test, a first clock-gating circuit within a functional circuit block is configured to provide a first delay to the clock signal. A second clock-gating circuit within the functional circuit block may provide a second delay to the clock signal, the second delay being different from the first.

Abstract translation: 公开了一种用于实现基于模式的偏斜的方法和装置。 在一个实施例中，IC包括多个不同的功能单元，每个功能单元被耦合以接收多个不同时钟信号中的相应一个。 一个或多个功能电路块包括至少两个时钟门控电路，其被耦合以接收提供给该功能电路块的时钟信号。 在扫描测试期间，功能电路块内的第一时钟选通电路被配置为向时钟信号提供第一延迟。 功能电路块内的第二时钟选通电路可以向时钟信号提供第二延迟，第二延迟与第一延迟不同。

公开(公告)号：US20160061889A1

公开(公告)日：2016-03-03

申请号：US14468394

申请日：2014-08-26

Applicant: Apple Inc.

Inventor： Asad A. Bawa ,  Benjamin A. Marrou ,  Christopher Ng ,  Michael R. Seningen ,  Mihir S. Sabnis ,  Zameeruddin Mohammed ,  Yi Zhao

IPC: G01R31/3177

CPC classification number: G01R31/318552 ,  G01R31/3177 ,  G01R31/318541 ,  G01R31/318563 ,  G01R31/318575

Abstract: A method and apparatus for implementing mode based skew is disclosed. In one embodiment, an IC includes a number of different functional units each coupled to receive a respective one of a number of different clock signals. One or more of the functional circuit blocks includes at least two clock-gating circuits that are coupled to receive the clock signal provided to that functional circuit block. During a scan test, a first clock-gating circuit within a functional circuit block is configured to provide a first delay to the clock signal. A second clock-gating circuit within the functional circuit block may provide a second delay to the clock signal, the second delay being different from the first.

Abstract translation: 公开了一种用于实现基于模式的偏斜的方法和装置。 在一个实施例中，IC包括多个不同的功能单元，每个功能单元被耦合以接收多个不同时钟信号中的相应一个。 一个或多个功能电路块包括至少两个时钟门控电路，其被耦合以接收提供给该功能电路块的时钟信号。 在扫描测试期间，功能电路块内的第一时钟选通电路被配置为向时钟信号提供第一延迟。 功能电路块内的第二时钟选通电路可以向时钟信号提供第二延迟，第二延迟与第一延迟不同。