INTEGRATED CIRCUIT WITH TUNABLE CAPACITOR ARRAY

    公开(公告)号:US20250132244A1

    公开(公告)日:2025-04-24

    申请号:US18616727

    申请日:2024-03-26

    Applicant: Apple Inc.

    Abstract: The present disclosure describes a semiconductor structure that is resistant to induced eddy currents. The semiconductor device includes a substrate, a device layer having electronic devices on the substrate, and a metallization layer above the device layer. The first metallization layer includes first and second terminal traces, a switch, and capacitors. A first terminal of a capacitor of the capacitors is coupled to the first terminal trace via the switch. A second terminal of the capacitor is coupled to the second terminal trace. The first and second terminal traces are disposed along the same side of the capacitors.

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