公开(公告)号：US20250045904A1

公开(公告)日：2025-02-06

申请号：US18230127

申请日：2023-08-03

Applicant: Applied Materials Israel Ltd.

Inventor： Gilad VERED ,  Dror ALUMOT ,  Rafael BISTRITZER ,  Hadar SHLOMAI-NAPARSTEK ,  Yarden ZOHAR

IPC: G06T7/00 ,  G06T7/10 ,  G06T7/50 ,  G06V10/46 ,  G06V10/764

Abstract: A system for examining a semiconductor specimen that includes a plurality of layers at respective different depths, and a plurality of holes. Each hole has a top portion at the surface of the specimen, and a bottom portion accommodated in one of the layers. The system includes a processing and memory circuitry (PMC) configured to provide an inspection image indicative of the holes, and process a hole image in the inspection image, without using a shape characterizing model. The processing includes segmenting the inspection image and determining data indicative of a contour of the top portion of the hole, and further segmenting the inspection image and determining data indicative of a contour of a shape enclosed within the contour of the top of the hole.