摘要:
The receiver (1) is for receiving radio-synchronous signals for adjusting the time base of a timepiece. The receiver includes an antenna (2) for receiving radio-synchronous signals, a low noise amplifier (3), connected to the antenna, a frequency conversion unit (7) for converting the frequency of the filtered and amplified incoming signals from the amplifier, and a processing unit (8) receiving data signals (data_out) from the conversion unit for adjusting the time base. The conversion unit includes a local oscillator stage (10) with a quartz (12) for supplying oscillating signals (Sm) at a determined frequency, a mixer unit (4) for mixing the incoming signals with the oscillating signals from the oscillator stage to generate intermediate signals (IF), a bandpass filter (5) for filtering the intermediate signals (IF), and a demodulator (6) receiving the filtered intermediate signals and supplying the data signals. The local oscillator stage is configured automatically by a control signal (Cm) from the processing unit to adapt the frequency of the oscillating signals (Sm) in accordance with the incoming radio-synchronous signal frequency, so that the intermediate signal (IF) frequency is within the frequency band of the bandpass filter.
摘要:
The receiver (1) for FSK modulation signals includes an antenna (2) for receiving modulated data or control signals, a low noise amplifier (3) for amplifying and filtering the signals picked up by the antenna, a local oscillator (6) with a quartz resonator (7) for supplying high frequency, in-phase signals (SI), and high frequency, in-quadrature signals (SQ), first and second mixers (4, 5) for mixing the high frequency, in-phase and in-quadrature signals with the filtered and amplified incoming signals, in order to generate intermediate signals (Im, Qm), and a filtering unit (12) for filtering the intermediate signals. The receiver can be configured to receive modulated data or control signals at low rate. The filtering unit supplies intermediate signals (IF, QF) filtered in a polyphase filter (13) to a first demodulation stage in medium or high rate mode, or intermediate, baseband signals filtered in the polyphase filter, which is converted into two low-pass filters (14, 15), to a second demodulation stage in low rate mode.
摘要:
The high sensitivity FSK radiofrequency signal receiver includes an antenna for receiving FSK radiofrequency signals, a LNA amplifier receiving signals picked up by the antenna, a local oscillator for supplying oscillating signals, a mixer for mixing the incoming signals with the oscillating signals to produce intermediate signals. The receiver includes a broadband or poly-phase filter for filtering the intermediate signals, and a sampler for supplying sampled intermediate signals to a high sensitivity demodulation stage, which supplies data signals. The receiver includes a processing circuit for performing a discrete Fourier transform of sampled intermediate signals. The selector at the processing circuit output determines the difference between the signal amplitude peak frequency above a determined threshold and the expected frequency of the intermediate signals. The frequency difference enables for correcting the oscillating signals frequency, to enable the demodulation stage to demodulate the data in the sampled intermediate signals and supply data signals.
摘要:
The receiver (1) picks up low rate FSK radio frequency signals. This receiver includes an antenna (2) for receiving FSK radio frequency signals, a low noise amplifier (3) connected to the antenna, a local oscillator (7) for supplying oscillating signals (LO), a phase shift circuit (16) for performing a 0° to 90° phase shift, and vice versa, in the oscillating signals (LO) or the incoming FSK radio frequency signals in each semi-period of a phase switching cycle (1/fs). The phase shift circuit alternately and successively generates in-phase and quadrature oscillating signals, or in-phase and quadrature incoming FSK radio frequency signals. The receiver includes a single mixer (4) for mixing the oscillating signals successively with the incoming FSK radio frequency signals, so as to generate alternately intermediate in-phase and quadrature baseband signals (INT) as a function of the phase shift circuit. The receiver further includes a low-pass filter (8) for filtering the intermediate in-phase and quadrature signals, and a demodulation stage (20) for demodulating the data (DOUT) from the filtered intermediate signals. The receiver is arranged such that the phase shift circuit (16) is switched by a phase selection signal (SEL) to a phase switching cycle frequency (fs) which is lower than the frequency deviation (Δf) of the modulated data in the FSK radio frequency signals and higher than the data rate frequency. Magic circuits (14, 15) in the demodulation stage reconstruct the intermediate signals during each switch operation for continuous demodulation in the demodulator (12).
摘要:
The data processing unit (15) for a receiver of signals carrying information (1) includes a clock and data recovery circuit (16) on the basis of a data signal (DOUT), and a processor circuit (17) connected to the clock and data recovery circuit. The clock and data recovery circuit is clocked by a local clock signal (CLK) and includes a numerical phase lock loop, in which a numerically controlled oscillator (25) is arranged. This numerically controlled oscillator generates an in-phase pulse signal (IP) and a quadrature pulse signal (QP) at output. The frequency and phase of the pulse signals IP and QP are adapted on the basis of the received data signal (DOUT). The processor circuit is arranged to calculate over time the mean and variance of the numerical input signal (NCOIN) of the numerically controlled oscillator (25), so as to determine the coherence of the data signal if the calculated mean and variance are below a predefined coherence threshold.