Multi-mode power amplifier
    1.
    发明授权
    Multi-mode power amplifier 有权
    多模功率放大器

    公开(公告)号:US07157966B2

    公开(公告)日:2007-01-02

    申请号:US11016397

    申请日:2004-12-17

    IPC分类号: H03G5/16

    摘要: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.

    摘要翻译: 功率放大器包括输入网络,输出级并联并且被配置为在相应的功率范围内最佳地输出功率,耦合到输入网络的输出级,耦合到输出级的输出阻抗匹配网络,并且不包含 开关元件和偏置控制网络,耦合在输出阻抗匹配网络,输入网络和输出级之间。 在一些放大器中,输出阻抗匹配网络不包含与被配置为在最高范围内输出功率的输出级相对应的开关元件。 在其他放大器中,偏置控制网络配置为通过为隔离输出级的晶体管提供硬切断来隔离输出级。

    Multi-mode power amplifier
    2.
    发明申请
    Multi-mode power amplifier 有权
    多模功率放大器

    公开(公告)号:US20060132232A1

    公开(公告)日:2006-06-22

    申请号:US11016397

    申请日:2004-12-17

    IPC分类号: H03F1/14

    摘要: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.

    摘要翻译: 功率放大器包括输入网络,输出级并联并且被配置为在相应的功率范围内最佳地输出功率,耦合到输入网络的输出级,耦合到输出级的输出阻抗匹配网络,并且不包含 开关元件和偏置控制网络,耦合在输出阻抗匹配网络,输入网络和输出级之间。 在一些放大器中,输出阻抗匹配网络不包含与被配置为在最高范围内输出功率的输出级相对应的开关元件。 在其他放大器中,偏置控制网络配置为通过为隔离输出级的晶体管提供硬切断来隔离输出级。

    Temperature compensated voltage regulator integrated with MMIC's
    3.
    发明授权
    Temperature compensated voltage regulator integrated with MMIC's 失效
    温度补偿稳压器与MMIC集成

    公开(公告)号:US07304541B2

    公开(公告)日:2007-12-04

    申请号:US11195886

    申请日:2005-08-03

    IPC分类号: H03F3/04

    摘要: A voltage regulator integrated with a monolithic microwave integrated circuit (MMIC) power amplifier that supplies a regulated bias current to the MMIC power amplifier that is compensated for temperature and voltage supply variations. The regulator circuit includes HBT transistors for current mirrors and a voltage regulator where a base-emitter voltage drop compensates for a similar base emitter drop in the current mirrors. The regulator circuit is designed to maintain constant the bias voltage and mirror currents with changes in Vcc and temperature. The compensated constant bias current to the MMIC power amplifier maintains uniform operating parameters for the power amplifier.

    摘要翻译: 集成了单片微波集成电路(MMIC)功率放大器的稳压器,为MMIC功率放大器提供稳压偏置电流,可补偿温度和电压电源变化。 调节器电路包括用于电流镜的HBT晶体管和电压调节器,其中基极 - 发射极电压降补偿电流镜中类似的基极发射极的下降。 调节器电路设计为保持Vcc和温度变化的偏置电压和镜像电流恒定。 向MMIC功率放大器补偿的恒定偏置电流为功率放大器保持均匀的工作参数。

    Temperature compensated voltage regulator integrated with MMIC's
    4.
    发明申请
    Temperature compensated voltage regulator integrated with MMIC's 失效
    温度补偿稳压器与MMIC集成

    公开(公告)号:US20060284684A1

    公开(公告)日:2006-12-21

    申请号:US11195886

    申请日:2005-08-03

    IPC分类号: H03F3/04

    摘要: A voltage regulator integrated with a monolithic microwave integrated circuit (MMIC) power amplifier that supplies a regulated bias current to the MMIC power amplifier that is compensated for temperature and voltage supply variations. The regulator circuit includes HBT transistors for current mirrors and a voltage regulator where a base-emitter voltage drop compensates for a similar base emitter drop in the current mirrors. The regulator circuit is designed to maintain constant the bias voltage and mirror currents with changes in Vcc and temperature. The compensated constant bias current to the MMIC power amplifier maintains uniform operating parameters for the power amplifier.

    摘要翻译: 集成了单片微波集成电路(MMIC)功率放大器的稳压器,为MMIC功率放大器提供稳压偏置电流,可补偿温度和电压电源变化。 调节器电路包括用于电流镜的HBT晶体管和电压调节器,其中基极 - 发射极电压降补偿电流镜中类似的基极发射极的下降。 调节器电路设计为保持Vcc和温度变化的偏置电压和镜像电流恒定。 向MMIC功率放大器补偿的恒定偏置电流为功率放大器保持均匀的工作参数。

    High-frequency switching device with reduced harmonics
    9.
    发明授权
    High-frequency switching device with reduced harmonics 有权
    具有降低谐波的高频开关器件

    公开(公告)号:US07492209B2

    公开(公告)日:2009-02-17

    申请号:US11492504

    申请日:2006-07-24

    IPC分类号: H03K17/00 H03K17/16

    摘要: According to one exemplary embodiment, a low harmonic switching device includes a first switching block including a first multi-gate FET, where the first switching block is coupled to a first input and a shared output of the low harmonic switching device. A first capacitor is coupled between a first gate and a source of the first multi-gate FET and a second capacitor is coupled between a second gate and a drain of the first multi-gate FET so as to cause a reduction in a harmonic amplitude in the shared output. A resistor can couple the source to the drain of the first multi-gate FET. The first switching block can further include a second multi-gate FET, where a source of the second multi-gate FET is coupled to the drain of the first multi-gate FET and a drain of the second multi-gate FET is coupled to the shared output.

    摘要翻译: 根据一个示例性实施例,低谐波开关器件包括第一开关块,其包括第一多栅极FET,其中第一开关模块耦合到低谐波开关器件的第一输入端和共享输出端。 第一电容器耦合在第一多栅极FET的第一栅极和源极之间,并且第二电容器耦合在第一多栅极FET的第二栅极和漏极之间,以便使谐波幅度降低 共享输出。 电阻器可将源极耦合到第一多栅极FET的漏极。 第一开关块还可以包括第二多栅极FET,其中第二多栅极FET的源极耦合到第一多栅极FET的漏极,并且第二多栅极FET的漏极耦合到 共享输出。

    High-frequency switching device with reduced harmonics
    10.
    发明申请
    High-frequency switching device with reduced harmonics 有权
    具有降低谐波的高频开关器件

    公开(公告)号:US20070243849A1

    公开(公告)日:2007-10-18

    申请号:US11492504

    申请日:2006-07-24

    IPC分类号: H04B1/28

    摘要: According to one exemplary embodiment, a low harmonic switching device includes a first switching block including a first multi-gate FET, where the first switching block is coupled to a first input and a shared output of the low harmonic switching device. A first capacitor is coupled between a first gate and a source of the first multi-gate FET and a second capacitor is coupled between a second gate and a drain of the first multi-gate FET so as to cause a reduction in a harmonic amplitude in the shared output. A resistor can couple the source to the drain of the first multi-gate FET. The first switching block can further include a second multi-gate FET, where a source of the second multi-gate FET is coupled to the drain of the first multi-gate FET and a drain of the second multi-gate FET is coupled to the shared output.

    摘要翻译: 根据一个示例性实施例,低谐波开关器件包括第一开关块,其包括第一多栅极FET,其中第一开关模块耦合到低谐波开关器件的第一输入端和共享输出端。 第一电容器耦合在第一多栅极FET的第一栅极和源极之间,并且第二电容器耦合在第一多栅极FET的第二栅极和漏极之间,以便使谐波幅度降低 共享输出。 电阻器可将源极耦合到第一多栅极FET的漏极。 第一开关块还可以包括第二多栅极FET,其中第二多栅极FET的源极耦合到第一多栅极FET的漏极,并且第二多栅极FET的漏极耦合到 共享输出。