公开(公告)号：US20030200484A1

公开(公告)日：2003-10-23

申请号：US10125900

申请日：2002-04-18

Applicant: BAE Systems Information and Electronic Systems Integration, Inc.

Inventor： Bruce McWilliam ,  Ronald Todd ,  Thomas M. Storey

IPC: H04B001/74

CPC classification number: G01R31/318552 ,  G01R31/31725

Abstract: A procedure for temporally isolating an environmentally dependent integrated circuit fault includes the steps of determining a marginally failing and a minimally passing environmental condition corresponding to the fault; identifying a clock cycle Tmax at which the fault was first detected; determining a candidate clock cycle at which the fault may have occurred; and iteratively a) applying test pattern subsets from an initial clock cycle through the candidate clock cycle under the marginally failing environmental condition; b) applying remaining test patterns under the minimally passing environmental condition; and c) adjusting the candidate clock cycle based upon whether the fault occurred during test pattern subset application up through the candidate clock cycle under the marginally failing environmental condition. Candidate clock cycle adjustment in accordance with a binary search technique enables determination of an exact clock cycle at which the fault occurred in a maximum of Log2 (Tmaxnull1) iterations.

Abstract translation: 用于时间上隔离环境依赖的集成电路故障的过程包括确定与故障相对应的边缘故障和最小通过的环境条件的步骤; 识别故障首次被检测到的时钟周期Tmax; 确定可能发生故障的候选时钟周期; 并迭代地a）在初始时钟周期内将测试模式子集应用于边缘化环境条件下的候选时钟周期; b）在最小通过的环境条件下应用剩余的测试图案; 以及c）基于在所述稍微失败的环境条件下通过候选时钟周期在测试模式子集应用期间是否发生故障来调整候选时钟周期。 根据二进制搜索技术的候选时钟周期调整使得能够以最大的Log2（Tmax + 1）迭代确定故障发生的精确时钟周期。