-
公开(公告)号:US20230367738A1
公开(公告)日:2023-11-16
申请号:US17741915
申请日:2022-05-11
Inventor: David D. MOSER , Daniel L. STANLEY , Jennifer KOEHLER , Stephen A. CHADWICK
CPC classification number: G06F15/7825 , G06F15/7839 , H01L29/785 , G06F2015/763
Abstract: A logic power network provided in an application-specific integrated circuit (ASIC). The ASIC includes a central processor. The ASIC also includes at least one intellectual property (IP) core operatively connected with the central processor and having a set of electrical components provided therein. The ASIC also includes a network-on-chip (NOC) operatively connected with the central processor and the at least one IP core. The ASIC also includes a logic power network operatively connected with the central processor, the at least one IP core and the set of electrical components therein, and the NOC. The logic power network is adapted to control power of the at least one IP core and the set of electrical components provided in the at least one IP Core individually and separately.