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公开(公告)号:US10885251B2
公开(公告)日:2021-01-05
申请号:US16282442
申请日:2019-02-22
Inventor: Jeffrey E. Robertson , Mary T. Hanley , Elizabeth J. Williams
IPC: G06F30/33 , G06F30/3323
Abstract: A system and method of verifying hardware that includes software configured to control its operation, the method comprising providing an abstracted version of hardware to be tested; verifying the functionality of the hardware; writing test bench software using physical-layer routines; drafting hybrid verification intellectual property modules, wherein the hybrid verification intellectual property modules comprise both synthesizable and non-synthesizable code and are configured to stimulate the abstracted hardware and to test software anticipated to be used in connection therewith; and creating network-level routines that can be passed to physical-layer routines as part of a hardware verification process.
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公开(公告)号:US20200272701A1
公开(公告)日:2020-08-27
申请号:US16282442
申请日:2019-02-22
Inventor: Jeffrey E. Robertson , Mary T. Hanley , Elizabeth J. Williams
IPC: G06F17/50
Abstract: A system and method of verifying hardware that includes software configured to control its operation, the method comprising providing an abstracted version of hardware to be tested; verifying the functionality of the hardware; writing test bench software using physical-layer routines; drafting hybrid verification intellectual property modules, wherein the hybrid verification intellectual property modules comprise both synthesizable and non-synthesizable code and are configured to stimulate the abstracted hardware and to test software anticipated to be used in connection therewith; and creating network-level routines that can be passed to physical-layer routines as part of a hardware verification process.
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