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公开(公告)号：US11087203B2
公开(公告)日：2021-08-10
申请号：US15618415
申请日：2017-06-09
Inventor： Yong Wang , Jian Ouyang , Wei Qi , Sizhong Li
Abstract: The present application discloses a method and apparatus for processing a data sequence. A specific implementation of the method includes: receiving an inputted to-be-processed data sequence; copying a weight matrix in a recurrent neural network model to an embedded block random access memory (RAM) of a field-programmable gate array (FPGA); processing sequentially each piece of to-be-processed data in the to-be-processed data sequence by using an activation function in the recurrent neural network model and the weight matrix stored in the embedded block RAM; and outputting a processed data sequence corresponding to the to-be-processed data sequence. This implementation improves the data sequence processing efficiency of the recurrent neural network model.
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公开(公告)号：US20180129933A1
公开(公告)日：2018-05-10
申请号：US15618415
申请日：2017-06-09
Inventor： Yong Wang , Jian Ouyang , Wei Qi , Sizhong Li
CPC classification number: G06N3/0445 , G06N3/063
Abstract: The present application discloses a method and apparatus for processing a data sequence. A specific implementation of the method includes: receiving an inputted to-be-processed data sequence; copying a weight matrix in a recurrent neural network model to an embedded block random access memory (RAM) of a field-programmable gate array (FPGA); processing sequentially each piece of to-be-processed data in the to-be-processed data sequence by using an activation function in the recurrent neural network model and the weight matrix stored in the embedded block RAM; and outputting a processed data sequence corresponding to the to-be-processed data sequence. This implementation improves the data sequence processing efficiency of the recurrent neural network model.
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