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公开(公告)号：US20230084876A1
公开(公告)日：2023-03-16
申请号：US17940620
申请日：2022-09-08
申请人： BULL SAS
发明人： Cyril ALLOUCHE , Thomas AYRAL , Simon MARTIEL , Arnaud GAZDA
摘要： The present disclosure relates to a computing system for executing hybrid programs, said computing system comprising: hardware resources comprising quantum computing resources and classical computing resources, said quantum computing resources comprising one or more quantum computers; software resources to be executed on the hardware resources; wherein the software resources comprise a plurality of processing modules comprising interfaces of two possible types referred to as upstream interface and downstream interface, wherein said plurality of processing modules comprises: at least one quantum processing module for each quantum computer, wherein each quantum processing module comprises an upstream interface; a plurality of plugin modules, wherein each plugin module comprises both an upstream interface and a downstream interface; wherein a hybrid program is built by connecting at least one plugin module and one quantum processing module.
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公开(公告)号：US20210191698A1
公开(公告)日：2021-06-24
申请号：US17127233
申请日：2020-12-18
申请人： BULL SAS
发明人： Arnaud GAZDA , Simon MARTIEL
摘要： Examples relate to a quantum computing compiling method that includes ordering quantum gates of a nearest neighbor quantum circuit in function of dependencies between the quantum gates to obtain a quantum gates hierarchical order. The hierarchical order includes a succession of front lines comprising multiple respective quantum gates of the nearest neighbor quantum circuit. The method includes successively selecting, for each front line, and following the hierarchical order, a shuttling for each respective quantum gate of the front line. The shuttling selection is, for each front line, based on a predefined constraint.
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公开(公告)号：US20230083913A1
公开(公告)日：2023-03-16
申请号：US17941603
申请日：2022-09-09
申请人： BULL SAS
发明人： Cyril ALLOUCHE , Thomas AYRAL , Simon MARTIEL
IPC分类号： H04L41/0806
摘要： This invention relates to a method of building a hybrid quantum-classical computing network, comprising: a first step of transformation of an application composed of services into a Petri net including both Petri places (8, 9) and Petri transitions (81, 82, 91-94) between said Petri places (8, 9), any said Petri place (8, 9) corresponding to: either a first type building block corresponding to any quantum processing unit (8) which processes a job into a result, or a second type building block corresponding to any plugin unit (9), which converts a job into another job and/or a result into another result, any Petri transition (81, 82, 91-94) corresponding to any link between two building blocks (8, 9), all said links (81, 82, 91-94) being formatted so as to make any building block (8, 9) interchangeable, a second step of transformation of said Petri net into a hybrid quantum-classical computing network, replacing any building block by its corresponding unit (8, 9), interconnecting all said corresponding units (8, 9) together by replacing any Petri transition (81, 82, 91-94) by a connection simply transmitting without processing nor converting.
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公开(公告)号：US20210406755A1
公开(公告)日：2021-12-30
申请号：US17355803
申请日：2021-06-23
申请人： BULL SAS
IPC分类号： G06N10/00 , H03K19/195
摘要： The present disclosure relates to a compiling method (50) for converting an input quantum circuit into an output quantum circuit compliant with predetermined constraints of a quantum computer, said input quantum circuit being composed of quantum gates to be applied to a set of qubits, said quantum gates arranged successively in an execution order, wherein said method comprises, for each quantum gate of the input quantum circuit processed according to the execution order:
if the processed quantum gate corresponds to an operator of a set of synthesizable operators: (S53) update the synthesizable accumulated operator to include the operator corresponding to the quantum gate,
otherwise: a) (S54) synthesize a partial quantum sub-circuit partially implementing the current synthesizable accumulated operator and modify accordingly the synthesizable accumulated operator, and b) (S55) append the partial quantum sub-circuit to the output quantum circuit.-
公开(公告)号：US20240354610A1
公开(公告)日：2024-10-24
申请号：US18134280
申请日：2023-04-13
申请人： BULL SAS
发明人： Arnaud GAZDA , Simon MARTIEL
摘要： The disclosure refers to method for converting an input quantum circuit comprising gates into an output quantum circuit compliant with execution constraints, comprising:
/a/ determining if a front layer comprises single-qubit gates, and updating the front layer;
/b/ reiterating step /a/ as long as the front layer comprises single-qubit gates;
/c/ identifying in the front layer a quantum gate that does not satisfy execution constraints;
/d/ determining a pattern such that the gate satisfies the execution constraints when applying the adjoint pattern to the gate;
/e/ adding the pattern to the output quantum circuit, and applying the ajoint pattern to the gate;
/f/ reiterating steps /a/-/e/ until each quantum gate in the input quantum circuit satisfies the execution constraints;
wherein each pattern is determined in such a way that a number of CNOT-gates comprised by at least one pattern is minimized.-
公开(公告)号：US20230297867A1
公开(公告)日：2023-09-21
申请号：US18120111
申请日：2023-03-10
申请人： BULL SAS
发明人： Arnaud GAZDA , Simon MARTIEL , Jon OILLARBURU
IPC分类号： G06N10/20
CPC分类号： G06N10/20
摘要： Method for implementing a graph (G) comprising a plurality of vertices (V) and links (E) between the vertices, a set (R) being a collection of subsets (Ri) of said a given number of vertices (Rik) comprising:
in said set (R), selecting subsets (Ri, Rj), called pre-selected subsets, such that a tree (Ti, Tj) is associated respectively to said tree (Ti, Tj), said associated trees (Ti, Tj) being pairwise disjoint;
comparing the number of vertices (Rik) associated to each of the pre-selected subset,
among the pre-selected subsets, choosing the subset for which the number of vertices is the highest-
公开(公告)号：US20210286599A1
公开(公告)日：2021-09-16
申请号：US17198732
申请日：2021-03-11
申请人： BULL SAS
发明人： Arnaud GAZDA , Simon MARTIEL
摘要： Examples include quantum computing compiling methods comprising considering a threshold corresponding to a maximum number of qubits available for processing in any one subsystem of a plurality of interconnected qubit subsystems and identifying a total number of qubits submitted to a specific quantum circuit, the total number of qubits exceeding the threshold. The methods comprise compiling a first section of the specific quantum circuit on a first subsystem by successively selecting quantum gates. If a selected quantum gate is to be applied to qubits assigned to different subsystems, the passing of a qubit from the first subsystem to a second subsystem through a junction connecting the first subsystem to the second subsystem is coded, and the second section of the specific quantum circuit is compiled on the second subsystem.
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公开(公告)号：US20200219002A1
公开(公告)日：2020-07-09
申请号：US16727016
申请日：2019-12-26
申请人： BULL SAS
摘要： A method for compiling a quantum circuit on a trapped-ion quantum processor includes: obtaining a quantum circuit containing a first predetermined category of two-qubit quantum gates, and/or one-qubit quantum gates; a separation of the quantum circuit into local layers, and entangling layers; compiling the local layers; compiling the entangling layers, separate from the step of compiling the local layers, transforming the quantum gates of those entangling layers so that they contain only collective or entangling N-qubit quantum gates of a third predetermined category, one-qubit quantum gates of a fourth predetermined category; and a step of grouping together the compiled local layers and the compiled entangling layers into a compiled quantum circuit.
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公开(公告)号：US20240160991A1
公开(公告)日：2024-05-16
申请号：US18208423
申请日：2023-06-12
申请人： BULL SAS
发明人： Simon MARTIEL
CPC分类号： G06N10/80 , G06F9/45508
摘要： A method for calculating, using a non-quantum computer, a value of an observable sampled out of a quantum state is over-optimized for reducing memory size and calculation time. It may be useful for emulating a quantum circuit that produces the quantum state. The method uses implementations of Pauli rotations and Pauli operators that are simple and cheap, based on coordinate-switching operations.
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公开(公告)号：US20200242295A1
公开(公告)日：2020-07-30
申请号：US16756145
申请日：2018-10-12
申请人： BULL SAS
发明人： Simon MARTIEL , Elise RUBAT CIAGNUS
IPC分类号： G06F30/392 , G06N10/00 , G06F30/394 , G06F30/398
摘要： Disclosed is a method for optimizing a quantum circuit of an ordered series of quantum gates, applied to an initial layout of qubit values, consisting in inserting a set of local SWAP gates so that all gates of the circuit are local, the method including: for each gate, if it is not local, inserting a set of local SWAP gates; determining the set of permutations, each consisting of a succession of swaps of qubit values along shortest paths between positions of qubits associated with the gate; and choosing, from the permutations, a permutation that minimizes a cost representing the number of swaps necessary to make the gates of a sequence within the series, of substantially smaller size, local; re-establishing the initial layout by establishing a tree covering a graph representative of the layout of the qubits of the circuit, and by swapping qubit values along paths of the tree.
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