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公开(公告)号：US20090199062A1
公开(公告)日：2009-08-06
申请号：US12362543
申请日：2009-01-30
CPC分类号： H03M13/2957 , H03M13/2739 , H03M13/6306 , H03M13/6356 , H03M13/6362 , H03M13/653 , H04L1/005 , H04L1/0066 , H04L1/0067 , H04L1/1819
摘要： Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.
摘要翻译： 用于速率匹配的虚拟限制缓冲区修改。 在通信设备内采用缩小尺寸的存储器模块以帮助存储根据turbo解码所采用的对数似然比（LLR）。 该架构也适用于除turbo码之外的其他类型的纠错码（ECC）。 选择存储器大小以匹配包含在传输内的编码比特数（例如，包括信息比特和冗余/奇偶校验比特）。 所接收的信号可以是根据混合自动重传请求（HARQ）传输而进行的各种传输。 当从第一HARQ传输计算的LLR不足以解码时，那些LLR被选择性地存储在存储器模块中。 当接收到对应于第二HARQ传输的LLR时，对应于第一HARQ传输和第二HARQ传输两者的LLR从存储器模块传递以用于解码。
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公开(公告)号：US20120195398A1
公开(公告)日：2012-08-02
申请号：US13429553
申请日：2012-03-26
IPC分类号： H04L27/06
CPC分类号： H03M13/2957 , H03M13/2739 , H03M13/6306 , H03M13/6356 , H03M13/6362 , H03M13/653 , H04L1/005 , H04L1/0066 , H04L1/0067 , H04L1/1819
摘要： Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.
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公开(公告)号：US08229039B2
公开(公告)日：2012-07-24
申请号：US12273506
申请日：2008-11-18
CPC分类号： H04L1/1835 , H03M13/09 , H03M13/2957 , H03M13/6306 , H04L1/0066 , H04L1/1819
摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.
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公开(公告)号：US20090135965A1
公开(公告)日：2009-05-28
申请号：US12273506
申请日：2008-11-18
IPC分类号： H04L27/06
CPC分类号： H04L1/1835 , H03M13/09 , H03M13/2957 , H03M13/6306 , H04L1/0066 , H04L1/1819
摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.
摘要翻译： 灵活的费率匹配。 在实现速率匹配时，对发送通信设备没有限制或限制。 接收通信设备能够适应基本上任何大小的接收的传输（例如，直到包括所有系统位和全部奇偶校验位的整个turbo码字）。 接收通信设备采用相对较小尺寸的存储器来确保较低成本，较小尺寸的通信设备（例如，手机或诸如个人无线通信设备的用户设备）。 此外，实现增量冗余，其中连续传输不需要包括其中的重复信息（例如，第二传输不需要包括来自第一传输的任何重复信息）。 只有到达要发送的比特或码字块的结束时，并且当在这种比特位块或码字的结尾发生环绕时，才会在稍后的传输中产生比特重复。
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公开(公告)号：US08408475B2
公开(公告)日：2013-04-02
申请号：US13555415
申请日：2012-07-23
CPC分类号： H04L1/1835 , H03M13/09 , H03M13/2957 , H03M13/6306 , H04L1/0066 , H04L1/1819
摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.
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公开(公告)号：US08341490B2
公开(公告)日：2012-12-25
申请号：US13429553
申请日：2012-03-26
IPC分类号： H03M13/00
CPC分类号： H03M13/2957 , H03M13/2739 , H03M13/6306 , H03M13/6356 , H03M13/6362 , H03M13/653 , H04L1/005 , H04L1/0066 , H04L1/0067 , H04L1/1819
摘要： Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.
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公开(公告)号：US20120287973A1
公开(公告)日：2012-11-15
申请号：US13555415
申请日：2012-07-23
IPC分类号： H04L1/08
CPC分类号： H04L1/1835 , H03M13/09 , H03M13/2957 , H03M13/6306 , H04L1/0066 , H04L1/1819
摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.
摘要翻译： 灵活的费率匹配。 在实现速率匹配时，对发送通信设备没有限制或限制。 接收通信设备能够适应基本上任何大小的接收的传输（例如，直到包括所有系统位和全部奇偶校验位的整个turbo码字）。 接收通信设备采用相对较小尺寸的存储器来确保较低成本，较小尺寸的通信设备（例如，手机或诸如个人无线通信设备的用户设备）。 此外，实现增量冗余，其中连续传输不需要包括其中的重复信息（例如，第二传输不需要包括来自第一传输的任何重复信息）。 只有到达要发送的比特或码字块的结束时，并且当发生这种比特位或码字的结束时包围，才能在稍后的传输中产生比特的任何重复。
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公开(公告)号：US08145974B2
公开(公告)日：2012-03-27
申请号：US12362543
申请日：2009-01-30
IPC分类号： H03M13/00
CPC分类号： H03M13/2957 , H03M13/2739 , H03M13/6306 , H03M13/6356 , H03M13/6362 , H03M13/653 , H04L1/005 , H04L1/0066 , H04L1/0067 , H04L1/1819
摘要： Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.
摘要翻译： 用于速率匹配的虚拟限制缓冲区修改。 在通信设备内采用缩小尺寸的存储器模块以帮助存储根据turbo解码所采用的对数似然比（LLR）。 该架构也适用于除turbo码之外的其他类型的纠错码（ECC）。 选择存储器大小以匹配包含在传输内的编码比特数（例如，包括信息比特和冗余/奇偶校验比特）。 所接收的信号可以是根据混合自动重传请求（HARQ）传输而进行的各种传输。 当从第一HARQ传输计算的LLR不足以解码时，那些LLR被选择性地存储在存储器模块中。 当接收到对应于第二HARQ传输的LLR时，对应于第一HARQ传输和第二HARQ传输两者的LLR从存储器模块传递以用于解码。
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公开(公告)号：US08341492B2
公开(公告)日：2012-12-25
申请号：US12508459
申请日：2009-07-23
申请人： Ba-Zhong Shen , Tak K. Lee
发明人： Ba-Zhong Shen , Tak K. Lee
IPC分类号： H03M13/00
CPC分类号： H03M13/1105 , H04L1/0068
摘要： Quasi-cyclic LDPC (Low Density Parity Check) code construction is presented that ensures no four cycles therein (e.g., in the bipartite graphs corresponding to the LDPC codes). Each LDPC code has a corresponding LDPC matrix that is composed of square sub-matrices, and based on the size of the sub-matrices of a particular LDPC matrix, then sub-matrix-based cyclic shifting is performed as not only a function of sub-matrix size, but also the row and column indices, to generate CSI (Cyclic Shifted Identity) sub-matrices. When the sub-matrix size is prime (e.g., each sub-matrix being size q×q, where q is a prime number), then it is guaranteed that no four cycles will exist in the resulting bipartite graph corresponding to the LDPC code of that LDPC matrix. When q is a non-prime number, an avoidance set can be used and/or one or more sub-matrices can be made to be an all zero-valued sub-matrix.
摘要翻译： 提出了准循环LDPC（Low Density Parity Check，低密度奇偶校验）码构造，其中不存在四个周期（例如，在对应于LDPC码的二分图中）。 每个LDPC码具有由平方子矩阵组成的对应的LDPC矩阵，并且基于特定LDPC矩阵的子矩阵的大小，然后基于子矩阵的循环移位不仅作为子函数执行 - 矩阵大小，也是行和列索引，以生成CSI（循环移位标识）子矩阵。 当子矩阵大小为素数（例如，每个子矩阵的大小为q×q，其中q为质数）时，则保证在对应于LDPC码的LDPC码的所得到的二分图中不存在四个周期 那个LDPC矩阵。 当q是非素数时，可以使用回避集合和/或可以使一个或多个子矩阵成为全零值子矩阵。
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10.发明授权Single CRC polynomial for both turbo code block CRC and transport block CRC 有权用于turbo码块CRC和传输块CRC的单个CRC多项式公开(公告)号：US08234551B2
公开(公告)日：2012-07-31
申请号：US12261572
申请日：2008-10-30
申请人： Ba-Zhong Shen , Tak K. Lee
发明人： Ba-Zhong Shen , Tak K. Lee
IPC分类号： H03M13/11
CPC分类号： H03M13/09 , H04L1/0057 , H04L1/0066
摘要： Single CRC polynomial for both turbo code block CRC and transport block CRC. Rather than employing multiple and different generation polynomials for generating CRC fields for different levels within a coded signal, a single CRC polynomial is employed for the various levels. Effective error correction capability is achieved with minimal hardware requirement by using a single CRC polynomial for various layers of CRC encoding. Such CRC encoding can be implemented within any of a wide variety of communication devices that may be implemented within a wide variety of communication systems (e.g., a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system, etc.). In addition, a single CRC check can be employed within a receiver (or transceiver) type communication device for each of the various layers of CRC of a received signal.
摘要翻译： 用于turbo码块CRC和传输块CRC的单个CRC多项式。 不是采用多个不同的生成多项式来生成用于编码信号内的不同级别的CRC字段，而是针对各种级别使用单个CRC多项式。 通过对CRC编码的各个层使用单个CRC多项式，以最小的硬件要求实现了有效的纠错能力。 这种CRC编码可以在可以在各种各样的通信系统（例如，卫星通信系统，无线通信系统，有线通信系统和光纤通信）中实现的各种通信设备中的任何一种内实现 系统等）。 此外，对于接收信号的CRC的各个层中的每一个，可以在接收机（或收发器）类型通信设备内采用单个CRC校验。
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