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公开(公告)号:US11144215B2
公开(公告)日:2021-10-12
申请号:US16697954
申请日:2019-11-27
Inventor: Honghe Tan , Liang Chen
IPC: G06F3/06
Abstract: A method, an apparatus, and an electronic device for controlling memory access are disclosed. According to an embodiment, there is provided a method for controlling access to a memory including a plurality of memory modules configured in parallel. The method comprises: receiving an access instruction including an addressing field which comprise a parallel control field for controlling parallel access, a module address field for indicating a memory module, and an in-module address field for indicating an addresses within a memory module; parsing the access instructions to determine the parallel control field, the module address field and the in-module address field; determining one or more memory modules to be accessed based on the parallel control field and the module address field; and accessing one or more addresses which are within the one or more memory modules to be accessed and assigned by the in-module address field.
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公开(公告)号:US20200174682A1
公开(公告)日:2020-06-04
申请号:US16697954
申请日:2019-11-27
Inventor: Honghe Tan , Liang Chen
IPC: G06F3/06
Abstract: A method, an apparatus, and an electronic device for controlling memory access are disclosed. According to an embodiment, there is provided a method for controlling access to a memory including a plurality of memory modules configured in parallel. The method comprises: receiving an access instruction including an addressing field which comprise a parallel control field for controlling parallel access, a module address field for indicating a memory module, and an in-module address field for indicating an addresses within a memory module; parsing the access instructions to determine the parallel control field, the module address field and the in-module address field; determining one or more memory modules to be accessed based on the parallel control field and the module address field; and accessing one or more addresses which are within the one or more memory modules to be accessed and assigned by the in-module address field.
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公开(公告)号:US11163686B2
公开(公告)日:2021-11-02
申请号:US16715127
申请日:2019-12-16
Inventor: Chen Sun , Zhenjiang Wang , Liang Chen , Kun Ling
IPC: G06F12/08 , G06F3/06 , G06F12/0868 , G06F12/10 , G06N3/063
Abstract: Disclosed are a method and an apparatus for accessing tensor data. The method may include determining a first row address in a first memory where one or more first data items to be accessed in a logical structure of the tensor data are stored at the first row address, copying data items at the first row address in the first memory to a first buffer row of a first buffer, moving each first data item in the first buffer row of the first buffer to a corresponding location at least in a first buffer row of a second buffer, and storing data items in the first buffer row of the second buffer into corresponding target locations in the second memory.
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