公开(公告)号：US20200083170A1

公开(公告)日：2020-03-12

申请号：US16451530

申请日：2019-06-25

申请人： Bok Eng Cheah ,  Jackson Chung Peng Kong ,  Loke Yip Foo ,  Wai Ling Lee

发明人： Bok Eng Cheah ,  Jackson Chung Peng Kong ,  Loke Yip Foo ,  Wai Ling Lee

IPC分类号： H01L23/538 ,  H01L25/16 ,  H01L21/48 ,  H01L25/00

摘要： A semiconductor device and associated methods are disclosed. In one example, dies are interconnected through a bridge in a substrate. A reference voltage stack extends over at least a portion of the interconnect bridge, and a passive component is coupled to the reference voltage stack. In one example, the passive component helps to reduce interference in the power supply to components in the semiconductor device, such as the dies and the interconnect bridge.

公开(公告)号：US20210098375A1

公开(公告)日：2021-04-01

申请号：US16912638

申请日：2020-06-25

申请人： Loke Yip Foo ,  Teong Guan Yew ,  Choong Kooi Chee

发明人： Loke Yip Foo ,  Teong Guan Yew ,  Choong Kooi Chee

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

摘要： A dual-sided embedded multi-die interconnect bridge provides power and source conduits from the bridge bottom at a silicon portion, in short paths to dice on a die side of an integrated-circuit package substrate. Signal traces are in a metallization on the silicon portion of the dual-sided EMIB. Power, ground and signal vias all emanate from the dual-sided embedded multi-die interconnect bridge, with power and ground entering the bridge from central regions of the silicon portion.