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    Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate and pointed channel region
    1.
    发明申请
    Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate and pointed channel region 有权
    形成具有埋置浮栅和尖通道区域的浮栅存储器单元的半导体存储器阵列的自对准方法

    公开(公告)号：US20050199914A1

    公开(公告)日：2005-09-15

    申请号：US11070079

    申请日：2005-03-01

    申请人： Bomy Chen ,  Ying Tsui ,  Wen-Juei Lu

    发明人： Bomy Chen ,  Ying Tsui ,  Wen-Juei Lu

    IPC分类号： H01L27/10 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L29/73

    CPC分类号： H01L27/11556 ,  H01L27/115 ,  H01L29/42336 ,  H01L29/7885

    摘要： A method of forming an array of floating gate memory cells, and an array formed thereby, wherein a trench is formed into a surface of a semiconductor substrate. The source region is formed underneath the trench, the drain region is formed along the substrate surface, and the channel region therebetween includes a first portion extending vertically along the trench sidewall and a second portion extending horizontally along the substrate surface. The floating gate is disposed in the trench adjacent to and insulated from the channel region first portion. The control gate is disposed over and insulated from the channel region second portion. The trench sidewall meets the substrate surface at an acute angle to form a sharp edge. The channel region second portion extends from the second region in a direction toward the sharp edge and the floating gate to define a path for programming the floating gate with electrons via hot electron injection.

    摘要翻译： 一种形成浮置栅极存储单元阵列的方法，以及由此形成的阵列，其中沟槽形成在半导体衬底的表面中。 源极区形成在沟槽下方，漏极区沿着衬底表面形成，并且其间的沟道区包括沿着沟槽侧壁垂直延伸的第一部分和沿衬底表面水平延伸的第二部分。 浮动栅极设置在与沟道区域第一部分相邻并与沟槽区域第一部分绝缘的沟槽中。 控制栅极设置在通道区域第二部分之上并与沟道区域第二部分绝缘。 沟槽侧壁以锐角与衬底表面相接触以形成锋利的边缘。 沟道区域第二部分从朝向尖锐边缘的方向从第二区域延伸，并且浮置栅极限定用于通过热电子注入用电子编程浮动栅极的路径。