公开(公告)号：US20030117186A1

公开(公告)日：2003-06-26

申请号：US10349473

申请日：2003-01-22

Applicant: Broadcom Corp.

Inventor： Daniel W. Dobberpuhl

IPC: H03B001/00

CPC classification number: H03K19/0016 ,  G06F1/10

Abstract: A conditional clock buffer circuit is disclosed. In one embodiment, a conditional clock buffer circuit includes a precharge circuit, a first transistor and a second transistor coupled to the precharge circuit via the first node and the second node, a third transistor coupled to the first transistor and the second transistor. The first transistor may be activated responsive to a condition external to the clock buffer circuit. When the first transistor is activated, an output clock signal driven by the clock buffer circuit may be inhibited.