TOPOLOGY CONFIGURATION OF PROCESSING ELEMENTS ARRAY BY USING PACKETS
    1.
    发明申请
    TOPOLOGY CONFIGURATION OF PROCESSING ELEMENTS ARRAY BY USING PACKETS 有权
    加工元件的拓扑结构通过使用包装阵列

    公开(公告)号:US20160323174A1

    公开(公告)日:2016-11-03

    申请号:US14719852

    申请日:2015-05-22

    CPC classification number: H04L41/12 H04L41/0803

    Abstract: In some aspects, the disclosure is directed to methods and systems for topology configuration of an array of packet processing elements via a topology configuration packet. Each processing element may include input packet busses from a first plurality of neighboring processing elements and output packet busses to a second plurality of neighboring processing elements. Each processing element may receive the configuration packet from one of the first plurality of neighboring elements, set its own topology configuration register according to predetermined values within the packet, and forward the packet out all of its outputs, in the same manner as a standard packet.

    Abstract translation: 在一些方面,本公开涉及用于经由拓扑配置分组的分组处理单元的阵列的拓扑配置的方法和系统。 每个处理元件可以包括来自第一多个相邻处理元件的输入分组总线和输出分组总线到第二多个相邻处理单元。 每个处理元件可以从第一多个相邻元件之一接收配置分组,根据分组内的预定值设置其自己的拓扑配置寄存器,并以与标准分组相同的方式将分组转发出其所有输出 。

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