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公开(公告)号：US20140307638A1
公开(公告)日：2014-10-16
申请号：US13892200
申请日：2013-05-10
Applicant: Broadcom Corporation
Inventor： Leena Zacharias , Stephanie Felicia Pereira , Erik Richard Stauffer , Kamlesh Rath
CPC classification number: H04W72/082 , H04L5/001 , H04L5/0053 , H04L5/0073 , H04L5/0085 , H04L5/0098 , H04W72/0406 , H04W72/0453
Abstract: A system for interference mitigation through carrier aggregation may include one or more processors and a memory. The memory may include instructions that, when executed by the one or more processors, cause the one or more processors to: provide data transmissions and control transmissions to a wireless device over a primary component carrier, determine that interference exists on the primary component carrier, and switch at least a portion of the data or control transmissions to a secondary component carrier in response to determining that the interference exists on the primary component carrier, while maintaining connectivity on the primary component carrier.
Abstract translation: 用于通过载波聚合的干扰减轻的系统可以包括一个或多个处理器和存储器。 存储器可以包括当由一个或多个处理器执行时使得一个或多个处理器在主要分量载体上提供数据传输和控制到无线设备的传输的指令，确定主要分量载波上存在干扰， 并且响应于确定主要分量载波上存在干扰，同时保持主分量载波上的连通性，将数据或控制传输的至少一部分切换到次分量载波。
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公开(公告)号：US09967891B2
公开(公告)日：2018-05-08
申请号：US15017513
申请日：2016-02-05
Applicant: Broadcom Corporation
Inventor： Leena Zacharias , Stephanie Felicia Pereira , Erik Richard Stauffer , Kamlesh Rath
CPC classification number: H04W72/082 , H04L5/001 , H04L5/0053 , H04L5/0073 , H04L5/0085 , H04L5/0098 , H04W72/0406 , H04W72/0453
Abstract: A system for interference mitigation through carrier aggregation may include one or more processors and a memory. The memory may include instructions that, when executed by the one or more processors, cause the one or more processors to: provide data transmissions and control transmissions to a wireless device over a primary component carrier, determine that interference exists on the primary component carrier, and switch at least a portion of the data or control transmissions to a secondary component carrier in response to determining that the interference exists on the primary component carrier, while maintaining connectivity on the primary component carrier.
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公开(公告)号：US09288027B2
公开(公告)日：2016-03-15
申请号：US13892200
申请日：2013-05-10
Applicant: Broadcom Corporation
Inventor： Leena Zacharias , Stephanie Felicia Pereira , Erik Richard Stauffer , Kamlesh Rath
CPC classification number: H04W72/082 , H04L5/001 , H04L5/0053 , H04L5/0073 , H04L5/0085 , H04L5/0098 , H04W72/0406 , H04W72/0453
Abstract: A system for interference mitigation through carrier aggregation may include one or more processors and a memory. The memory may include instructions that, when executed by the one or more processors, cause the one or more processors to: provide data transmissions and control transmissions to a wireless device over a primary component carrier, determine that interference exists on the primary component carrier, and switch at least a portion of the data or control transmissions to a secondary component carrier in response to determining that the interference exists on the primary component carrier, while maintaining connectivity on the primary component carrier.
Abstract translation: 用于通过载波聚合的干扰减轻的系统可以包括一个或多个处理器和存储器。 存储器可以包括当由一个或多个处理器执行时使得一个或多个处理器在主要分量载体上提供数据传输和控制到无线设备的传输的指令，确定主要分量载波上存在干扰， 并且响应于确定主要分量载波上存在干扰，同时保持主分量载波上的连通性，将数据或控制传输的至少一部分切换到次分量载波。
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