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公开(公告)号:US20210118940A1
公开(公告)日:2021-04-22
申请号:US17072460
申请日:2020-10-16
IPC分类号: H01L27/146
摘要: A process includes providing electronic chips, the chips having been diced beforehand and each including a stack including a matrix-array of pixels, an interconnect layer, first layer, joining the electronic chips to a carrier substrate, so as to leave a spacing region between the chips; forming a redistribution layer having lateral ends extending into each spacing region; forming metal pillars on the lateral ends; moulding a material including first segments, facing the first layers, second segments which are separate from the first segments, and which extend around the metal pillars; the first and second segments being coplanar; applying a heat treatment, the formed material being chosen so that the stack is curved with a convex shape; the second segments remaining coplanar at the end.
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公开(公告)号:US20230115626A1
公开(公告)日:2023-04-13
申请号:US17938783
申请日:2022-10-07
发明人: Jean-Philippe COLONNA , Jean BRUN , Sami OUKASSI
IPC分类号: H01M10/0585 , H01M10/0562 , H01M50/562
摘要: A battery includes, stacked successively above a first face of a support, in a stacking direction, at least a cathode including a lower face, an upper face and a side wall directed in the stacking direction from the lower face to the upper face, a solid electrolyte, an anode, the battery including a coating portion surrounding, and in contact with, all of the side wall of the cathode, without covering the upper face of the cathode.
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