Optical mouse chip with silicon retina structure
    1.
    发明授权
    Optical mouse chip with silicon retina structure 失效
    具有硅视网膜结构的光电鼠标芯片

    公开(公告)号:US06697052B2

    公开(公告)日:2004-02-24

    申请号:US09985200

    申请日:2001-11-02

    IPC分类号: G09G508

    CPC分类号: G06F3/0317

    摘要: An optical mouse chip with silicon retina structure comprises an image sensor array, an accumulator and a comparing/selecting unit. The image sensor array senses a direction parameter of an image along each axis. The accumulator sums the direction parameters of the image along different axes. The comparing/selecting unit selects a largest one from the sum of direction parameters of the image along different axes to determine a moving direction of the image.

    摘要翻译: 具有硅视网膜结构的光学鼠标芯片包括图像传感器阵列,累加器和比较/选择单元。 图像传感器阵列感测沿着每个轴的图像的方向参数。 累加器将不同轴的图像的方向参数相加。 比较/选择单元从沿着不同轴的图像的方向参数的总和中选择最大的一个,以确定图像的移动方向。

    Structural analysis method of deep trenches
    2.
    发明申请
    Structural analysis method of deep trenches 审中-公开
    深沟结构分析方法

    公开(公告)号:US20070141732A1

    公开(公告)日:2007-06-21

    申请号:US11401366

    申请日:2006-04-11

    IPC分类号: H01L21/66

    CPC分类号: H01L22/12

    摘要: A structural analysis method of deep trenches is provided. A substrate having a plurality of deep trenches is provided. A polishing process is performed on the substrate to form an incline in a partial region of the substrate to expose surface structures at different depths of the deep trenches. Then, a structural analysis of the surface structures at different depths of the deep trenches is performed to observe defects.

    摘要翻译: 提供深沟的结构分析方法。 提供具有多个深沟槽的衬底。 在衬底上进行抛光处理以在衬底的部分区域中形成倾斜,以暴露深沟槽不同深度处的表面结构。 然后,对深沟槽不同深度的表面结构进行结构分析,观察缺陷。

    Switched capacitor circuits
    3.
    发明授权
    Switched capacitor circuits 失效
    开关电容电路

    公开(公告)号:US07034737B1

    公开(公告)日:2006-04-25

    申请号:US11091073

    申请日:2005-03-28

    申请人: Kuan-Hsun Huang

    发明人: Kuan-Hsun Huang

    IPC分类号: H03M1/12

    CPC分类号: H03M1/147

    摘要: A switched capacitor circuit includes an amplifier, a first switched capacitor network, and a second switched capacitor network. Either the first or second switched capacitor network is switched in a sampling configuration or a gain configuration according to connection states of the switches thereof. The amplifier includes a first transistor and a second transistor coupled to the first switched capacitor network, and a third transistor and a fourth transistor coupled to the second switched capacitor network. A first switch is coupled to a first connection point of the first and second transistors, and a second switch is coupled to a second connection point of the third and fourth transistors.

    摘要翻译: 开关电容器电路包括放大器,第一开关电容器网络和第二开关电容器网络。 根据其开关的连接状态,第一或第二开关电容器网络以采样配置或增益配置来切换。 放大器包括耦合到第一开关电容器网络的第一晶体管和第二晶体管,以及耦合到第二开关电容器网络的第三晶体管和第四晶体管。 第一开关耦合到第一和第二晶体管的第一连接点,第二开关耦合到第三和第四晶体管的第二连接点。

    COMPARATOR AND METHOD FOR OPERATING THEREOF
    4.
    发明申请
    COMPARATOR AND METHOD FOR OPERATING THEREOF 审中-公开
    比较器及其操作方法

    公开(公告)号:US20080048731A1

    公开(公告)日:2008-02-28

    申请号:US11467429

    申请日:2006-08-25

    申请人: Kuan-Hsun Huang

    发明人: Kuan-Hsun Huang

    IPC分类号: H03K5/22

    CPC分类号: H03K3/356156 H03K3/35613

    摘要: A comparator including an amplifier unit, a latch unit, and a switch unit is provided. The amplifier unit receives and gains an input signal pair respectively and then outputs an output signal pair. The latch unit is coupled to the amplifier unit. During a tracking period, the latch unit is not powered, and during a latching period, the latch unit is powered to latch the output signal pair and then output a logical signal pair accordingly. The switch unit is coupled between the amplifier unit and the latch unit. During the tracking period, the switch unit transfers the output signal pair to the latch unit, and during the latch period, the switch unit separates the amplifier unit from the latch unit, and thereby reducing the influences to the comparator caused by the kick back noise and the offset error.

    摘要翻译: 提供了包括放大器单元,锁存单元和开关单元的比较器。 放大器单元分别接收并增益输入信号对,然后输出一个输出信号对。 锁存单元耦合到放大器单元。 在跟踪期间,锁存单元未通电,并且在锁存期间,锁存单元被供电以锁存输出信号对,然后相应地输出逻辑信号对。 开关单元耦合在放大器单元和锁存单元之间。 在跟踪期间,开关单元将输出信号对传送到锁存单元,并且在锁存期间,开关单元将放大器单元与锁存单元分开,从而减少由反冲噪声对比较器的影响 和偏移误差。