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公开(公告)号:US08350841B2
公开(公告)日:2013-01-08
申请号:US13016302
申请日:2011-01-28
申请人: Chia-Sheng Li , Yung-Chih Chen , Chih-Lung Lin
发明人: Chia-Sheng Li , Yung-Chih Chen , Chih-Lung Lin
CPC分类号: G09G3/20 , G09G3/3648 , G09G2330/04
摘要: An ESD protection circuit comprises three transistors and two voltage dividers. The two source/drain terminals of a first transistor are electrically coupled to a first power line and a second power line respectively. The two source/drain terminals of a second transistor are electrically coupled to the first power line and a gate terminal of the first transistor respectively. The two source/drain terminals of a third transistor are electrically coupled to the gate terminal of the first transistor and the second power line respectively. A first voltage divider supplies a first voltage to a gate terminal of the second transistor according to a potential difference between the first power line and the second power line. A second voltage divider supplies a second voltage to a gate terminal of the third transistor according to the potential difference between the first power line and the second power line.
摘要翻译: ESD保护电路包括三个晶体管和两个分压器。 第一晶体管的两个源极/漏极端子分别电耦合到第一电力线和第二电力线。 第二晶体管的两个源极/漏极端子分别电耦合到第一电源线和第一晶体管的栅极端子。 第三晶体管的两个源极/漏极端子分别电耦合到第一晶体管和第二电源线的栅极端子。 第一分压器根据第一电力线和第二电力线之间的电位差向第二晶体管的栅极端子提供第一电压。 第二分压器根据第一电力线和第二电力线之间的电位差向第三晶体管的栅极端子提供第二电压。