摘要:
In a television signal frame number converter for converting an input television signal having a first frame number per second into an output television signal having a second frame number per second in accordance with an interpolation coefficient, a processing unit processes two successive frames of the input television signal by a frame interpolation process to produce a processed signal. A memory unit memorizes the processed signal in synchronism with a write-in address signal given by a first frame synchronizing signal of the input television signal and is read out by a read-out address signal given by a second frame synchronizing signal of a reference television signal having the second frame number per second. The converter determines the interpolation coefficient in accordance with a time interval between a write-in start timing of the memory unit and a read-out start timing of the memory unit.
摘要:
A signal conversion circuit is used to convert a parallel signal to a serial signal and comprises a parallel input/serial output type of shift register having input terminals corresponding in number to at least n+k bits (n and k: integer), an inverting circuit and a timing circuit. The n-bit input parallel signal is applied to n successive input terminals of the shift register and k bit of the n-bit parallel signal is inverted by the inverting circuit to be applied to the remaining k input terminal of the shift register. The (n+k)-bit parallel signal loaded into the shift register is serially output at a predetermined rate by the timing circuit to provide a serial signal.