公开(公告)号：US20120139605A1

公开(公告)日：2012-06-07

申请号：US13308478

申请日：2011-11-30

Applicant: Chung-Chang Lin

Inventor： Chung-Chang Lin

IPC: H03L5/00

CPC classification number: H03K19/0008

Abstract: An integrated circuit includes: a circuit pin; a detecting circuit coupled to the circuit pin, and arranged to detect a signal level value of the circuit pin when the integrated circuit operates in a first operational mode; a storage circuit coupled to the detecting circuit, and arranged to store the signal level value; and a controlling circuit coupled to the storage circuit, and arranged to set a voltage level of the circuit pin according the signal level value when a processing circuit of the integrated circuit operates in a second operational mode.

Abstract translation: 集成电路包括：电路引脚; 检测电路，其耦合到所述电路引脚，并且被布置成当所述集成电路在第一操作模式下操作时检测所述电路引脚的信号电平值; 存储电路，耦合到所述检测电路，并且被布置成存储所述信号电平值; 以及控制电路，其耦合到所述存储电路，并且被布置成当所述集成电路的处理电路在第二操作模式下操作时，根据所述信号电平值来设置所述电路引脚的电压电平。

公开(公告)号：US08513979B2

公开(公告)日：2013-08-20

申请号：US13308478

申请日：2011-11-30

Applicant: Chung-Chang Lin

Inventor： Chung-Chang Lin

IPC: G01R19/00

CPC classification number: H03K19/0008

Abstract: An integrated circuit includes: a circuit pin; a detecting circuit coupled to the circuit pin, and arranged to detect a signal level value of the circuit pin when the integrated circuit operates in a first operational mode; a storage circuit coupled to the detecting circuit, and arranged to store the signal level value; and a controlling circuit coupled to the storage circuit, and arranged to set a voltage level of the circuit pin according the signal level value when a processing circuit of the integrated circuit operates in a second operational mode.

Abstract translation: 集成电路包括：电路引脚; 检测电路，其耦合到所述电路引脚，并且被布置成当所述集成电路在第一操作模式下操作时检测所述电路引脚的信号电平值; 存储电路，耦合到所述检测电路，并且被布置成存储所述信号电平值; 以及控制电路，其耦合到所述存储电路，并且被布置成当所述集成电路的处理电路在第二操作模式下操作时，根据所述信号电平值来设置所述电路引脚的电压电平。