公开(公告)号：US11477868B2

公开(公告)日：2022-10-18

申请号：US17123429

申请日：2020-12-16

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Dave Smith ,  Saurabh Singh ,  Andrew Buist ,  Paulius Cerebiejus ,  Mark J. McCloy-Stevens ,  Terence A. Orr

IPC: H05B45/10 ,  H05B45/34 ,  H05B45/345 ,  H03F3/04

Abstract: The present disclosure relates to current control circuitry for controlling a current through a load. The current control circuitry comprises amplifier circuitry, reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry and an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; and a current output terminal. The current control circuitry further comprises a variable resistance coupled to the current output terminal of the output stage, and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.

公开(公告)号：US11844157B2

公开(公告)日：2023-12-12

申请号：US17860918

申请日：2022-07-08

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Dave Smith ,  Saurabh Singh ,  Andrew Buist ,  Paulius Cerebiejus ,  Mark J. McCloy-Stevens ,  Terence A. Orr

IPC: H05B45/345 ,  H03F3/04

CPC classification number: H05B45/345 ,  H03F3/04 ,  H03F2200/129

Abstract: The present disclosure relates to current control circuitry for controlling a current through a load, the current control circuitry comprising: amplifier circuitry; reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry; an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; a current output terminal; a clock-controlled variable resistance coupled to the current output terminal of the output stage, wherein a resistance of the variable resistance is based on a digital code input to the variable resistance; and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.