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公开(公告)号：US11196500B1
公开(公告)日：2021-12-07
申请号：US16936624
申请日：2020-07-23
Applicant: Cisco Technology, Inc.
Inventor： Bhuvan Mital , Ashwin Kumar T.C. , Aravind Vinayak , Rahul Gupta
Abstract: Continuance in quality level of an input timing signal may be provided. Clock source reference timing information may be receive by a first node from a second node as an input. The first node may be downstream from the second node. Then the first node may receive an event message associated with a future event associated with the second node. The first node may then refrain, for a period of time in response to receiving the event message, from switching the input for clock source reference timing information to a source other than the second node.
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