公开(公告)号：US20240370180A1

公开(公告)日：2024-11-07

申请号：US18310268

申请日：2023-05-01

Applicant: DELL PRODUCTS L.P.

Inventor： Craig Chaiken ,  Shiven Pandya ,  Paul Jimenez

IPC: G06F3/06

Abstract: A system analyzes data associated with a failure of an information handling system by evaluating memory addresses found in memory, such as bug check parameters, context register values, or stacks in a memory dump, at the time of a fatal error to determine whether one of the memory addresses has a single-bit error, and modifying a first memory address with the single-bit error to generate a second memory address, wherein the first memory address is one of the memory addresses being evaluated. If a second memory address is mapped to the page table, the system authorizes a repair of the information handling system.