System and method for creating systolic solvers
    1.
    发明授权
    System and method for creating systolic solvers 失效
    用于创建收缩解决方案的系统和方法

    公开(公告)号:US07086038B2

    公开(公告)日:2006-08-01

    申请号:US10266720

    申请日:2002-10-07

    CPC classification number: G06F8/443 G06F17/5045

    Abstract: One embodiment of the invention is a method for forming a solver for a loop nest of code, the method comprising forming a time and space mapping of a portion of the loop nest, performing at least one optimization that is dependent on the time and space mapping to the portion of the loop nest, and forming a solver from the optimized portion of the loop nest.

    Abstract translation: 本发明的一个实施例是一种用于形成用于循环嵌套代码的求解器的方法,所述方法包括形成循环嵌套的一部分的时空映射,执行取决于时间和空间映射的至少一个优化 到环巢的部分,并且从环巢的优化部分形成求解器。

    System and method for reducing wire delay or congestion during synthesis of hardware solvers
    2.
    发明授权
    System and method for reducing wire delay or congestion during synthesis of hardware solvers 有权
    用于在硬件解算器合成期间减少线路延迟或拥塞的系统和方法

    公开(公告)号:US07107568B2

    公开(公告)日:2006-09-12

    申请号:US10266719

    申请日:2002-10-07

    CPC classification number: G06F17/5045 G06F17/5072

    Abstract: One embodiment of the invention is a method for producing a hardware solver for intermediate code comprising analyzing intermediate code for at least one instantiation that may cause at least one of wire delay and congestion in the solver, forming compensation for the at least one instantiation, and forming the solver in accordance with the compensation.

    Abstract translation: 本发明的一个实施例是一种用于生成用于中间代码的硬件求解器的方法,包括分析至少一个实例的中间代码,所述至少一个实例可能导致求解器中的线延迟和拥塞中的至少一个,形成对至少一个实例化的补偿,以及 根据补偿形成求解器。

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