Hierarchical error injection for complex RAIM/ECC design
    1.
    发明授权
    Hierarchical error injection for complex RAIM/ECC design 有权
    复杂RAIM / ECC设计的分层错误注入

    公开(公告)号:US08271932B2

    公开(公告)日:2012-09-18

    申请号:US12823010

    申请日:2010-06-24

    IPC分类号: G06F11/22 G06F17/50

    CPC分类号: G06F11/1008 G06F11/108

    摘要: A computer-implemented method for verifying a RAIM/ECC design using a hierarchical injection scheme that includes selecting marks for generating an error mask, selecting a fixed bit mask based on the selected marks, determining whether to inject errors into at least one of a marked channel and at least one marked chip of a channel; and randomly injecting errors into the at least one of the marked channel and the at least one marked chip when determined.

    摘要翻译: 一种用于使用分层注入方案来验证RAIM / ECC设计的计算机实现的方法,所述分级注入方案包括选择用于生成错误掩码的标记,基于所选择的标记选择固定位掩码,确定是否将错误注入至少一个标记 通道和至少一个通道的标记芯片; 以及当确定时将错误随机地注入所述标记通道和所述至少一个标记芯片中的至少一个中。

    HIERARCHICAL ERROR INJECTION FOR COMPLEX RAIM/ECC DESIGN
    2.
    发明申请
    HIERARCHICAL ERROR INJECTION FOR COMPLEX RAIM/ECC DESIGN 有权
    复杂RAIM / ECC设计的分层错误注入

    公开(公告)号:US20110320872A1

    公开(公告)日:2011-12-29

    申请号:US12823010

    申请日:2010-06-24

    IPC分类号: G06F11/28

    CPC分类号: G06F11/1008 G06F11/108

    摘要: A computer-implemented method for verifying a RAIM/ECC design using a hierarchical injection scheme that includes selecting marks for generating an error mask, selecting a fixed bit mask based on the selected marks, determining whether to inject errors into at least one of a marked channel and at least one marked chip of a channel; and randomly injecting errors into the at least one of the marked channel and the at least one marked chip when determined.

    摘要翻译: 一种用于使用分层注入方案来验证RAIM / ECC设计的计算机实现的方法,所述分级注入方案包括选择用于生成错误掩码的标记,基于所选择的标记选择固定位掩码,确定是否将错误注入至少一个标记 通道和至少一个通道的标记芯片; 以及当确定时将错误随机地注入所述标记通道和所述至少一个标记芯片中的至少一个中。