Half Width Counting Leading Zero Circuit
    1.
    发明申请
    Half Width Counting Leading Zero Circuit 失效
    半宽度计数导致零电路

    公开(公告)号:US20090055454A1

    公开(公告)日:2009-02-26

    申请号:US11844402

    申请日:2007-08-24

    IPC分类号: G06F15/00

    CPC分类号: G06F7/74

    摘要: A circuit and method are provided for storing a data word in a latch and determining the number of consecutive equal value bits within the data word. The data word consists of bits stored in unique bit positions and having a least significant bit position and a most significant bit position. The data word is examined to determine the number of consecutive bits having the same numeric value. The invention first corrects for any single bit anomaly within the consecutive equal value sequence, counts the number of consecutive bits having this equal value using logic that examines only every other bit position of the stored data word and provides a numeric value representing this number of consecutive equal value bits.

    摘要翻译: 提供了一种电路和方法,用于将数据字存储在锁存器中并确定数据字内的连续相等值位的数目。 数据字由存储在唯一位位置并具有最低有效位位置和最高有效位位置的位组成。 检查数据字以确定具有相同数值的连续位的数量。 本发明首先校正连续等值序列内的任何单个位异常,使用仅检查所存储的数据字的每隔一个比特位置的逻辑来计数具有该相等值的连续比特的数量,并提供表示该数目的连续的数量的数值 等值位。