公开(公告)号：US07218951B2

公开(公告)日：2007-05-15

申请号：US10885162

申请日：2004-07-06

申请人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

发明人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

IPC分类号： H04B7/00 ,  H04B1/04

CPC分类号： H04W52/52 ,  H03F1/0272 ,  H03F2200/294 ,  H03F2200/372 ,  H04B2001/0416

摘要： A single continuous closed-loop power control feedback system provides seamless power control for a power amplifier and also enables an AM signal to be injected into the power amplifier through the power amplifiers' control port. The AM signal is developed by an I/Q modulator and supplied to a comparator located in the power control loop. By using leakage from the power amplifier as feedback to a phase locked loop during initial power amplifier power ramp-up, the single continuous closed-loop power control system provides continuous feedback to the phase locked loop during the entire power amplification ramp-up period and eliminates the need for multiple feedback loops.

摘要翻译： 单个连续闭环功率控制反馈系统为功率放大器提供无缝功率控制，并且还可以通过功率放大器的控制端口将AM信号注入功率放大器。 AM信号由I / Q调制器开发，并提供给位于功率控制回路中的比较器。 在初始功率放大器功率提升期间，通过使用来自功率放大器的泄漏作为对锁相环的反馈，单个连续闭环功率控制系统在整个功率放大加速周期期间向锁相环提供连续反馈，并且 消除了对多个反馈环路的需要。

公开(公告)号：US06801784B1

公开(公告)日：2004-10-05

申请号：US09704930

申请日：2000-11-02

申请人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

发明人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

IPC分类号： H04B700

CPC分类号： H04W52/52 ,  H03F1/0272 ,  H03F2200/294 ,  H03F2200/372 ,  H04B2001/0416

摘要： A single continuous closed-loop power control feedback system provides seamless power control/for a power amplifier and also enables an AM signal to be injected into the power amplifier through the power amplifiers' control port. The AM signal is developed by an I/Q modulator and supplied to a comparator located in the power control loop. By using leakage from the power amplifier as feedback to a phase locked loop during initial power amplifier power ramp-up, the single continuous closed-loop power control system provides continuous feedback to the phase locked loop during the entire power amplification ramp-up period and eliminates the need for multiple feedback loops,

摘要翻译： 单个连续闭环功率控制反馈系统为功率放大器提供无缝功率控制，并且还可以通过功率放大器的控制端口将AM信号注入功率放大器。 AM信号由I / Q调制器开发，并提供给位于功率控制回路中的比较器。 在初始功率放大器功率提升期间，通过使用来自功率放大器的泄漏作为对锁相环的反馈，单个连续闭环功率控制系统在整个功率放大加速周期期间向锁相环提供连续反馈，并且 消除了对多个反馈回路的需要，

公开(公告)号：US07099636B2

公开(公告)日：2006-08-29

申请号：US10392102

申请日：2003-03-18

申请人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

发明人： Dmitriy Rozenblit ,  Morten Damgaard ,  Russell J. Fagg ,  William J. Domino

IPC分类号： H01Q11/12

CPC分类号： H04W52/52 ,  H03F1/0272 ,  H03F2200/294 ,  H03F2200/372 ,  H04B2001/0416

摘要： A single continuous closed-loop power control feedback system provides seamless power control for a power amplifier and also enables an AM signal to be injected into the power amplifier through the power amplifiers' control port. The AM signal is developed by an I/Q modulator and supplied to a comparator located in the power control loop. By using leakage from the power amplifier as feedback to a phase locked loop during initial power amplifier power ramp-up, the single continuous closed-loop power control system provides continuous feedback to the phase locked loop during the entire power amplification ramp-up period and eliminates the need for multiple feedback loops.

摘要翻译： 单个连续闭环功率控制反馈系统为功率放大器提供无缝功率控制，并且还可以通过功率放大器的控制端口将AM信号注入功率放大器。 AM信号由I / Q调制器开发，并提供给位于功率控制回路中的比较器。 在初始功率放大器功率提升期间，通过使用来自功率放大器的泄漏作为对锁相环的反馈，单个连续闭环功率控制系统在整个功率放大加速周期期间向锁相环提供连续反馈，并且 消除了对多个反馈环路的需要。

公开(公告)号：US20110050296A1

公开(公告)日：2011-03-03

申请号：US12553498

申请日：2009-09-03

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H03B19/12

CPC分类号： H03B27/00 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2200/0074 ,  H03B2200/0078

摘要： A frequency divider involves a plurality of Injection-locked Ring Oscillators (ILRO). A first ILRO includes a pair of cross-coupled N-channel transistors, a pair of load resistors, an integrating capacitor, and a current injection circuit. The drain of each transistor is coupled to the gate of the other transistor. Each load resistor couples the drain of each transistor to a circuit voltage source. The integrating capacitor couples the sources of each transistor. The current injection circuit alternately opens and closes a path from the source of each transistor to circuit ground in response to an oscillatory input signal of a first frequency. In response, the voltage state at the drain of each transistor is alternately latched and toggled, generating a differential pair of oscillating signals frequency divided by two. A first and second ILRO driven in antiphase generate two differential output signals in phase quadrature.

摘要翻译： 分频器包括多个注入锁定环形振荡器（ILRO）。 第一ILRO包括一对交叉耦合的N沟道晶体管，一对负载电阻，积分电容器和电流注入电路。 每个晶体管的漏极耦合到另一个晶体管的栅极。 每个负载电阻将每个晶体管的漏极耦合到电路电压源。 积分电容耦合每个晶体管的源极。 电流注入电路响应于第一频率的振荡输入信号交替地打开和关闭从每个晶体管的源极到电路接地的路径。 作为响应，每个晶体管的漏极处的电压状态被交替地锁存和切换，产生频率除以2的振荡信号的差分对。 反相驱动的第一和第二ILRO产生相位正交的两个差分输出信号。

公开(公告)号：US08487670B2

公开(公告)日：2013-07-16

申请号：US12553498

申请日：2009-09-03

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H03B19/06

CPC分类号： H03B27/00 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2200/0074 ,  H03B2200/0078

摘要： A frequency divider involves a plurality of Injection-locked Ring Oscillators (ILRO). A first ILRO includes a pair of cross-coupled N-channel transistors, a pair of load resistors, an integrating capacitor, and a current injection circuit. The drain of each transistor is coupled to the gate of the other transistor. Each load resistor couples the drain of each transistor to a circuit voltage source. The integrating capacitor couples the sources of each transistor. The current injection circuit alternately opens and closes a path from the source of each transistor to circuit ground in response to an oscillatory input signal of a first frequency. In response, the voltage state at the drain of each transistor is alternately latched and toggled, generating a differential pair of oscillating signals frequency divided by two. A first and second ILRO driven in antiphase generate two differential output signals in phase quadrature.

摘要翻译： 分频器包括多个注入锁定环形振荡器（ILRO）。 第一ILRO包括一对交叉耦合的N沟道晶体管，一对负载电阻，积分电容器和电流注入电路。 每个晶体管的漏极耦合到另一个晶体管的栅极。 每个负载电阻将每个晶体管的漏极耦合到电路电压源。 积分电容耦合每个晶体管的源极。 电流注入电路响应于第一频率的振荡输入信号交替地打开和关闭从每个晶体管的源极到电路接地的路径。 作为响应，每个晶体管的漏极处的电压状态被交替地锁存和切换，产生频率除以2的振荡信号的差分对。 反相驱动的第一和第二ILRO产生相位正交的两个差分输出信号。

公开(公告)号：US08781430B2

公开(公告)日：2014-07-15

申请号：US12494109

申请日：2009-06-29

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H04B1/00

CPC分类号： H03H15/00

摘要： Exemplary embodiments of the invention disclose receiver baseband filtering. In an exemplary embodiment, the filter device may comprise a continuous-time filter and a discrete-time filter operably coupled to the continuous time-filter. The discrete-time filter may include a passive infinite impulse response filter operably coupled between the continuous-time filter and an amplifier. The discrete-time filter may also include an active infinite impulse response filter operably coupled between an output of the amplifier and an input of the amplifier. The discrete-time filter may be configured to combine an output of the active infinite impulse response filter and an output of the passive infinite impulse response filter to form a composite signal. Furthermore, the amplifier may be configured to receive and amplify the composite signal.

摘要翻译： 本发明的示例性实施例公开了接收机基带滤波。 在示例性实施例中，滤波器装置可以包括可操作地耦合到连续时间滤波器的连续时间滤波器和离散时间滤波器。 离散时间滤波器可以包括可操作地耦合在连续时间滤波器和放大器之间的被动无限脉冲响应滤波器。 离散时间滤波器还可以包括可操作地耦合在放大器的输出和放大器的输入之间的有源无限脉冲响应滤波器。 离散时间滤波器可以被配置为组合有源无限脉冲响应滤波器的输出和被动无限脉冲响应滤波器的输出以形成复合信号。 此外，放大器可以被配置为接收和放大复合信号。

公开(公告)号：US08212592B2

公开(公告)日：2012-07-03

申请号：US12633681

申请日：2009-12-08

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H03K21/00 ,  H03K23/00 ,  H03K25/00

CPC分类号： H03B19/14 ,  H03B27/00

摘要： Techniques for generating quadrature signals from a local oscillator signal, wherein the generated quadrature signals have a frequency half of the local oscillator frequency. In an exemplary embodiment, two oscillators, e.g., injection locked oscillators, are provided, each oscillator having a load, a cross-coupled transistor pair, an integrating capacitor, and current injection transistors. A differential pair is coupled to the leads of each of the integrating capacitors, and the drains of the differential pair are coupled to the outputs of the other oscillator to help increase the slew rate of the output voltages of the other oscillator. The inputs to the differential pair may be first amplified to improve the gain of the differential pair. In another exemplary embodiment, the power consumption of the differential pair may be reduced by operating them in a discontinuous mode, e.g., by coupling the source voltages of the differential pair to corresponding delayed versions of the drain voltages.

摘要翻译： 用于从本地振荡器信号产生正交信号的技术，其中产生的正交信号具有本地振荡器频率的一半的频率。 在示例性实施例中，提供了两个振荡器，例如注入锁定振荡器，每个振荡器具有负载，交叉耦合晶体管对，积分电容器和电流注入晶体管。 差分对耦合到每个积分电容器的引线，并且差分对的漏极耦合到另一振荡器的输出，以帮助增加另一个振荡器的输出电压的转换速率。 可以首先对差分对的输入进行放大以改善差分对的增益。 在另一示例性实施例中，可以通过例如通过将差分对的源电压耦合到相应的漏极电压的延迟版本来以不连续模式操作来减小差分对的功耗。

公开(公告)号：US20110043291A1

公开(公告)日：2011-02-24

申请号：US12633681

申请日：2009-12-08

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H03K3/03 ,  H03K5/12

CPC分类号： H03B19/14 ,  H03B27/00

摘要： Techniques for generating quadrature signals from a local oscillator signal, wherein the generated quadrature signals have a frequency half of the local oscillator frequency. In an exemplary embodiment, two oscillators, e.g., injection locked oscillators, are provided, each oscillator having a load, a cross-coupled transistor pair, an integrating capacitor, and current injection transistors. A differential pair is coupled to the leads of each of the integrating capacitors, and the drains of the differential pair are coupled to the outputs of the other oscillator to help increase the slew rate of the output voltages of the other oscillator. The inputs to the differential pair may be first amplified to improve the gain of the differential pair. In another exemplary embodiment, the power consumption of the differential pair may be reduced by operating them in a discontinuous mode, e.g., by coupling the source voltages of the differential pair to corresponding delayed versions of the drain voltages.

摘要翻译： 用于从本地振荡器信号产生正交信号的技术，其中产生的正交信号具有本地振荡器频率的一半的频率。 在示例性实施例中，提供了两个振荡器，例如注入锁定振荡器，每个振荡器具有负载，交叉耦合晶体管对，积分电容器和电流注入晶体管。 差分对耦合到每个积分电容器的引线，并且差分对的漏极耦合到另一振荡器的输出，以帮助增加另一个振荡器的输出电压的转换速率。 可以首先对差分对的输入进行放大以改善差分对的增益。 在另一示例性实施例中，可以通过例如通过将差分对的源电压耦合到相应的漏极电压的延迟版本来以不连续模式操作来减小差分对的功耗。

公开(公告)号：US20100327965A1

公开(公告)日：2010-12-30

申请号：US12494109

申请日：2009-06-29

申请人： Russell J. Fagg

发明人： Russell J. Fagg

IPC分类号： H03H7/00 ,  H03H7/01

CPC分类号： H03H15/00

摘要： Exemplary embodiments of the invention disclose receiver baseband filtering. In an exemplary embodiment, the filter device may comprise a continuous-time filter and a discrete-time filter operably coupled to the continuous time-filter. The discrete-time filter may include a passive infinite impulse response filter operably coupled between the continuous-time filter and an amplifier. The discrete-time filter may also include an active infinite impulse response filter operably coupled between an output of the amplifier and an input of the amplifier. The discrete-time filter may be configured to combine an output of the active infinite impulse response filter and an output of the passive infinite impulse response filter to form a composite signal. Furthermore, the amplifier may be configured to receive and amplify the composite signal.

摘要翻译： 本发明的示例性实施例公开了接收机基带滤波。 在示例性实施例中，滤波器装置可以包括可操作地耦合到连续时间滤波器的连续时间滤波器和离散时间滤波器。 离散时间滤波器可以包括可操作地耦合在连续时间滤波器和放大器之间的被动无限脉冲响应滤波器。 离散时间滤波器还可以包括可操作地耦合在放大器的输出和放大器的输入之间的有源无限脉冲响应滤波器。 离散时间滤波器可以被配置为组合有源无限脉冲响应滤波器的输出和被动无限脉冲响应滤波器的输出以形成复合信号。 此外，放大器可以被配置为接收和放大复合信号。