公开(公告)号：US07579861B2

公开(公告)日：2009-08-25

申请号：US11906365

申请日：2007-10-01

申请人： Dong-Suk Shin ,  Inhwa Jung ,  Chulwoo Kim ,  Hyung-Dong Lee ,  Young-Jung Choi

发明人： Dong-Suk Shin ,  Inhwa Jung ,  Chulwoo Kim ,  Hyung-Dong Lee ,  Young-Jung Choi

IPC分类号： H03K17/16 ,  H03K19/003

CPC分类号： H03K19/00384

摘要： An impedance-controlled pseudo-open drain output driver circuit includes: a process, voltage, and temperature (PVT) detector configured to have a delay line receiving a reference clock and detect a state variation of the delay line according to PVT conditions to output detection signals; a select signal generator configured to generate a driving select signal based on the detection signals and an output data; and an output driver configured to drive an output terminal, the output driver including a plurality of pull-up/pull-down driving blocks controlled by the driving select signal, each of the pull-up/pull-down driving blocks including a resistor having an intended impedance.

摘要翻译： 阻抗控制的伪开漏输出驱动电路包括：处理电压和温度（PVT）检测器，被配置为具有接收参考时钟的延迟线，并根据PVT条件检测延迟线的状态变化以输出检测 信号; 选择信号发生器，被配置为基于所述检测信号和输出数据产生驱动选择信号; 以及输出驱动器，被配置为驱动输出端子，所述输出驱动器包括由所述驱动选择信号控制的多个上拉/下拉驱动块，每个所述上拉/下拉驱动块包括具有 一个预期的阻抗。

公开(公告)号：US20080079458A1

公开(公告)日：2008-04-03

申请号：US11906365

申请日：2007-10-01

申请人： Dong-Suk Shin ,  Inhwa Jung ,  Chulwoo Kim ,  Hyung-Dong Lee ,  Young-Jung Choi

发明人： Dong-Suk Shin ,  Inhwa Jung ,  Chulwoo Kim ,  Hyung-Dong Lee ,  Young-Jung Choi

IPC分类号： H03K19/0185

CPC分类号： H03K19/00384

摘要： An impedance-controlled pseudo-open drain output driver circuit includes: a process, voltage, and temperature (PVT) detector configured to have a delay line receiving a reference clock and detect a state variation of the delay line according to PVT conditions to output detection signals; a select signal generator configured to generate a driving select signal based on the detection signals and an output data; and an output driver configured to drive an output terminal, the output driver including a plurality of pull-up/pull-down driving blocks controlled by the driving select signal, each of the pull-up/pull-down driving blocks including a resistor having an intended impedance.

摘要翻译： 阻抗控制的伪开漏输出驱动电路包括：处理电压和温度（PVT）检测器，被配置为具有接收参考时钟的延迟线，并根据PVT条件检测延迟线的状态变化以输出检测 信号; 选择信号发生器，被配置为基于所述检测信号和输出数据产生驱动选择信号; 以及输出驱动器，被配置为驱动输出端子，所述输出驱动器包括由所述驱动选择信号控制的多个上拉/下拉驱动块，每个所述上拉/下拉驱动块包括具有 一个预期的阻抗。