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1.发明授权公开(公告)号：US11211115B2
公开(公告)日：2021-12-28
申请号：US16866570
申请日：2020-05-05
发明人： Marco Antonio Rios , William Andrew Simon , Alexandre Sébastien Levisse , Marina Zapater , David Atienza Alonso
IPC分类号： G11C7/10 , G11C11/419 , G11C11/418 , G06F7/523
摘要： A random access memory array including a plurality of local memory group ways, each local memory group way including, a plurality of local memory groups, each local memory group including, a memory column including a plurality of memory cells, a pair of local bitlines operatively connected to the plurality of memory cells, and a local group periphery including a local bitline multiplexer operatively connected with the pairs of local bitlines of the corresponding local memory group; and a pair of global read bitlines operatively connected to outputs of the plurality of local group peripheries, a global read bitline multiplexer operatively connected to outputs of the plurality of pairs of the global read bitlines from the local memory group ways, and a bitline operational block operatively connected an output of the global read bitline multiplexer.
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2.发明申请公开(公告)号：US20210350846A1
公开(公告)日：2021-11-11
申请号：US16866570
申请日：2020-05-05
发明人： Marco Antonio Rios , William Andrew Simon , Alexandre Sébastien Levisse , Marina Zapater , David Atienza Alonso
IPC分类号： G11C11/419 , G11C11/418
摘要： A random access memory array including a plurality of local memory group ways, each local memory group way including, a plurality of local memory groups, each local memory group including, a memory column including a plurality of memory cells, a pair of local bitlines operatively connected to the plurality of memory cells, and a local group periphery including a local bitline multiplexer operatively connected with the pairs of local bitlines of the corresponding local memory group; and a pair of global read bitlines operatively connected to outputs of the plurality of local group peripheries, a global read bitline multiplexer operatively connected to outputs of the plurality of pairs of the global read bitlines from the local memory group ways, and a bitline operational block operatively connected an output of the global read bitline multiplexer.
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3.发明授权公开(公告)号：US11094355B1
公开(公告)日：2021-08-17
申请号：US16866566
申请日：2020-05-05
发明人： William Andrew Simon , Marco Antonio Rios , Alexandre Sébastien Levisse , Marina Zapater , David Atienza Alonso
摘要： A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a pair of global read bitlines, a local group read port arranged between the pair of local bitlines and the pair of global read bitlines for selectively accessing one of the local bitlines depending on a state of a selected bitcell, and a local group precharge circuit operatively arranged between the pair of local bitlines.
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