公开(公告)号：US20230334321A1

公开(公告)日：2023-10-19

申请号：US17976655

申请日：2022-10-28

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Su Woong LEE ,  Jong-Gook KO ,  Wonyoung YOO ,  Seungjae LEE ,  Yongsik LEE ,  Juwon LEE ,  Da-Un JUNG

IPC: G06N3/08

CPC classification number: G06N3/082 ,  G06N3/084

Abstract: Disclosed are a deep neural network lightweight device based on batch normalization, and a method thereof. The deep neural network lightweight device based on batch normalization includes a memory that stores at least one data and at least one processor that executes a network lightweight module. When executing the network lightweight module, the processor performs learning on an input neural network based on sparsity regularization to adaptively determine at least one parameter of the sparsity regularization, performs pruning on the learning result, and performs fine tuning on the pruning result.

公开(公告)号：US20220222525A1

公开(公告)日：2022-07-14

申请号：US17554870

申请日：2021-12-17

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Su Woong LEE ,  Seungjae LEE ,  Jong-Gook KO ,  Wonyoung YOO ,  Jung Jae YU ,  Keun Dong LEE ,  Yongsik LEE ,  Da-Un JUNG

IPC: G06N3/08 ,  G06K9/62

Abstract: Provided are a method and system for training a dynamic deep neural network. The method for training a dynamic deep neural network includes receiving an output of a last layer of the deep neural network and outputting a first loss, receiving an output of a routing module according to an input class of the deep neural network and outputting a second loss, calculating a third loss based on the first loss and the second loss, and updating a weight of the deep neural network by using the third loss.

公开(公告)号：US20210350241A1

公开(公告)日：2021-11-11

申请号：US17242604

申请日：2021-04-28

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Seungjae LEE ,  Jong-Gook KO ,  Keun Dong LEE ,  Su Woong LEE ,  Yongsik LEE ,  Da-Un JUNG ,  Wonyoung YOO

IPC: G06N3/08 ,  G06N3/04

Abstract: An apparatus and method for searching a neural network architecture may be disclosed. The apparatus may include an architecture searcher and an architecture evaluator. The architecture searcher may search for a topology between nodes included in a basic cell of a network, search for an operation to be applied between the nodes after searching for the topology, and determine the basic cell. The architecture evaluator may evaluate performance of the determined basic cell.