公开(公告)号：US20240295987A1

公开(公告)日：2024-09-05

申请号：US18660095

申请日：2024-05-09

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Kwang-Won KOH ,  Kang Ho KIM ,  Changdae KIM ,  Taehoon KIM

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0679

Abstract: A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.

公开(公告)号：US20220365712A1

公开(公告)日：2022-11-17

申请号：US17741187

申请日：2022-05-10

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Kwang-Won KOH ,  Kang Ho KIM ,  Changdae KIM ,  Taehoon KIM

IPC: G06F3/06

Abstract: A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.

公开(公告)号：US20220300331A1

公开(公告)日：2022-09-22

申请号：US17517284

申请日：2021-11-02

Applicant: Electronics and Telecommunications Research Institute

Inventor： Changdae KIM ,  Kwang-Won KOH ,  Kang Ho KIM ,  Taehoon KIM

IPC: G06F9/50 ,  G06F9/455

Abstract: An apparatus for memory integrated management in a cluster system including a plurality of physical nodes connected to each other by a network determines one of the plurality of physical nodes as a node to place a new virtual machine, allocates the first type of memory allocated to the one physical node to the new virtual machine as much as the memory capacity required by the new virtual machine, and distributes the second type of memory to a plurality of virtual machines running on the plurality of physical nodes by integrating and managing the second type of memory allocated to each of the plurality of physical nodes. In this case, the access speed of the second type of memory is faster than that of the first type of memory.

公开(公告)号：US20220197764A1

公开(公告)日：2022-06-23

申请号：US17542324

申请日：2021-12-03

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： SUNGIK JUN ,  Kwang-Won KOH ,  Kang Ho KIM ,  Changdae KIM ,  Taehoon KIM

IPC: G06F11/22 ,  G06F11/26 ,  G06N10/00

Abstract: Disclosed is a quantum diagnostic circuit, which includes an input unit having an input of at least first to fourth qubits, a diagnostic circuit unit receiving the first to fourth qubits from the input unit and providing a quantum superposition and a quantum entanglement, and an output unit receiving an output of the diagnostic circuit unit and determining whether the output is in a Bell-state, and the diagnostic circuit unit includes a Hadamard gate processing the first qubit to provide the quantum superposition of the first to fourth qubits, a first CNOT gate providing the quantum entanglement between an output of the Hadamard gate and the second qubit, a second CNOT gate providing the quantum entanglement between an output of the first CNOT gate and the third qubit, and a third CNOT gate providing the quantum entanglement between an output of the second CNOT gate and the fourth qubit.