公开(公告)号：US07464181B2

公开(公告)日：2008-12-09

申请号：US10662007

申请日：2003-09-11

申请人： Everett A. Corl, Jr. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Everett A. Corl, Jr. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： G06F15/173 ,  G06F15/16 ,  G06F12/00

CPC分类号： H04L45/00 ,  H04L69/22

摘要： The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.

摘要翻译： 网络设备的分类系统包括缓存，其中响应于会话中的第一“频繁传单”分组而存储TCP / IP分组的预定义特性与相关动作之间的映射。 如果所选择的特征和预定义的特征匹配，则从该会话的后续接收到的分组中选出的特征与预定义的特征相关联，并且将存储的动作应用于所接收的分组，从而减少后续分组所需的处理。 选择用于缓存的数据包可能是数据包。 对于不匹配的特征，分类系统的全分组搜索用于确定应用于接收到的分组的动作。

公开(公告)号：US20080298244A1

公开(公告)日：2008-12-04

申请号：US12188333

申请日：2008-08-08

申请人： Everett A. Corl, JR. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Everett A. Corl, JR. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L69/22

摘要： The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.

摘要翻译： 网络设备的分类系统包括缓存，其中响应于会话中的第一“频繁传单”分组而存储TCP / IP分组的预定义特性与相关动作之间的映射。 如果所选择的特征和预定义的特征匹配，则从该会话的后续接收到的分组中选出的特征与预定义的特征相关联，并且将存储的动作应用于所接收的分组，从而减少后续分组所需的处理。 选择用于缓存的数据包可能是数据包。 对于不匹配的特征，分类系统的全分组搜索用于确定应用于接收到的分组的动作。

公开(公告)号：US08005989B2

公开(公告)日：2011-08-23

申请号：US12188333

申请日：2008-08-08

申请人： Everett A. Corl, Jr. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Everett A. Corl, Jr. ,  Gordon T. Davis ,  Clark D. Jeffries ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： G06F15/173

CPC分类号： H04L45/00 ,  H04L69/22

摘要： The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.

摘要翻译： 网络设备的分类系统包括缓存，其中响应于会话中的第一“频繁传单”分组而存储TCP / IP分组的预定义特性与相关动作之间的映射。 如果所选择的特征和预定义的特征匹配，则从该会话的后续接收到的分组中选出的特征与预定义的特征相关联，并且将存储的动作应用于所接收的分组，从而减少后续分组所需的处理。 选择用于缓存的数据包可能是数据包。 对于不匹配的特征，分类系统的全分组搜索用于确定应用于接收到的分组的动作。

公开(公告)号：US20120218885A1

公开(公告)日：2012-08-30

申请号：US13466914

申请日：2012-05-08

申请人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin B. Verrilli

发明人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/24

CPC分类号： H04L47/6215

摘要： According to embodiments of the invention, there is provided a method for operating a network processor. The network processor receiving a first data packet in a stream of data packets and a set of receive-queues adapted to store receive data packets. The network processor processing the first data packet by reading a flow identification in the first data packet; determining a quality of service for the first data packet; mapping the flow identification and the quality of service into an index for selecting a first receive-queue for routing the first data packet; and utilizing the index to route the first data packet to the first receive-queue.

摘要翻译： 根据本发明的实施例，提供了一种用于操作网络处理器的方法。 网络处理器接收数据包流中的第一数据包和适于存储接收数据包的一组接收队列。 网络处理器通过读取第一数据分组中的流标识来处理第一数据分组; 确定第一数据分组的服务质量; 将流标识和服务质量映射到用于选择用于路由第一数据分组的第一接收队列的索引; 以及利用所述索引将所述第一数据分组路由到所述第一接收队列。

公开(公告)号：US20120204190A1

公开(公告)日：2012-08-09

申请号：US13365778

申请日：2012-02-03

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

IPC分类号： G06F9/46

CPC分类号： G06F9/546 ,  G06F9/544

摘要： A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.

摘要翻译： 提供了一种机制，用于在来自解析器的网络处理器结果和来自提供由所述解析器请求的处理支持的外部协处理器的结果中合并。 结果队列中的机制排队，解析器结果需要与协处理器结果合并，并且不需要与协处理器结果合并的解析器结果。 使用一个附加队列来排列存储解析器结果的结果队列的地址。 协处理器的结果是在简单的响应寄存器中接收的。 协处理器结果由响应寄存器的结果队列管理逻辑读取，并被合并到在附加队列中排队的地址的结果队列中读取的相应的不完整解析器结果。

公开(公告)号：US20120192190A1

公开(公告)日：2012-07-26

申请号：US13011663

申请日：2011-01-21

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

IPC分类号： G06F9/46

CPC分类号： G06F15/1735

摘要： A host Ethernet adapter (HEA) and method of managing network communications is provided. The HEA includes a host interface configured for communication with a multi-core processor over a processor bus. The host interface comprises a receive processing element including a receive processor, a receive buffer and a scheduler for dispatching packets from the receive buffer to the receive processor; a send processing element including a send processor and a send buffer; and a completion queue scheduler (CQS) for dispatching completion queue elements (CQE) from the head of the completion queue (CQ) to threads of the multi-core processor in a network node mode. The method comprises operatively coupling an Ethernet adapter to a multi-core processor system via a processor bus, selectively assigning a first plurality of packets to a first queue pair for servicing in an endpoint mode, running a device driver on the multi-core processing system, the device driver controlling the servicing of the first queue pair by dispatching the first plurality of packets to only one processor core of the multi-core processor system, selectively assigning a second plurality of packets to a second queue pair for servicing in a network node mode; and the Ethernet adapter controlling the servicing of the second queue pair by dispatching the second plurality of packets to multiple processor threads.

摘要翻译： 提供主机以太网适配器（HEA）和管理网络通信的方法。 HEA包括被配置为通过处理器总线与多核处理器进行通信的主机接口。 所述主机接口包括接收处理元件，所述接收处理元件包括接收处理器，接收缓冲器和用于从所述接收缓冲器向所述接收处理器分发分组的调度器; 包括发送处理器和发送缓冲器的发送处理元件; 以及用于从完成队列（CQ）的头部将网络节点模式中的多核处理器的线程调度完成队列元素（CQE）的完成队列调度器（CQS）。 该方法包括经由处理器总线可操作地将以太网适配器耦合到多核处理器系统，选择性地将第一多个分组分配到第一队列对以在端点模式下进行服务，在多核处理系统上运行设备驱动程序 所述设备驱动程序通过将所述第一多个分组分派到所述多核处理器系统的一个处理器核心来控制所述第一队列对的服务，选择性地将第二多个分组分配给第二队列对以在网络节点中进行服务 模式; 以及所述以太网适配器通过将所述第二多个分组分派到多个处理器线程来控制所述第二队列对的服务。

公开(公告)号：US20120155267A1

公开(公告)日：2012-06-21

申请号：US13302285

申请日：2011-11-22

申请人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin B. Verrilli

发明人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/26

CPC分类号： H04L47/6215

摘要： According to embodiments of the invention, there is provided a method, a system, and a computer program product for operating a network processor. The network processor processing a received data packet by reading a flow identification in the data packet; determining a quality of service criteria (QoSC) for the data packet; mapping the flow identification and the QoSC into an index for selecting a receive-queue for routing the data packet; and utilizing the index to route the data packet to the receive-queue.

摘要翻译： 根据本发明的实施例，提供了一种用于操作网络处理器的方法，系统和计算机程序产品。 网络处理器通过读取数据分组中的流标识来处理接收到的数据分组; 确定数据包的服务质量标准（QoSC）; 将流标识和QoSC映射到用于选择用于路由数据分组的接收队列的索引; 并利用索引将数据包路由到接收队列。

公开(公告)号：US07715428B2

公开(公告)日：2010-05-11

申请号：US11669419

申请日：2007-01-31

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Herman D. Dierks, Jr. ,  Christoph Raisch ,  Jan-Bernd Themann ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Herman D. Dierks, Jr. ,  Christoph Raisch ,  Jan-Bernd Themann ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/66 ,  H04J3/16 ,  H04J3/22

CPC分类号： H04L47/50

摘要： Mechanisms for processing of communications between data processing devices are provided. With the mechanisms of the illustrative embodiments, a set of techniques that enables sustaining media speed by distributing transmit and receive-side processing over multiple processing cores is provided. In addition, these techniques also enable designing multi-threaded network interface controller (NIC) hardware that efficiently hides the latency of direct memory access (DMA) operations associated with data packet transfers over an input/output (I/O) bus. Multiple processing cores may operate concurrently using separate instances of a communication protocol stack and device drivers to process data packets for transmission with separate hardware implemented send queue managers in a network adapter processing these data packets for transmission. Multiple hardware receive packet processors in the network adapter may be used, along with a flow classification engine, to route received data packets to appropriate receive queues and processing cores for processing.

摘要翻译： 提供了用于处理数据处理设备之间的通信的机制。 利用说明性实施例的机制，提供了一组通过在多个处理核上分发发送和接收侧处理来维持媒体速度的技术。 此外，这些技术还可以设计出多线程网络接口控制器（NIC）硬件，可有效地隐藏通过输入/输出（I / O）总线传输数据分组的直接存储器访问（DMA）操作的延迟。 多个处理核心可以使用通信协议栈和设备驱动程序的单独实例同时运行，以处理用于传输的数据分组，其中单独的硬件实现了处理这些数据分组以进行传输的网络适配器中的发送队列管理器。 可以使用网络适配器中的多个硬件接收分组处理器以及流分类引擎将接收到的数据分组路由到适当的接收队列和处理核心进行处理。

公开(公告)号：US09225644B2

公开(公告)日：2015-12-29

申请号：US13616201

申请日：2012-09-14

申请人： Claude Basso ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Claude Basso ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： G06F15/173 ,  H04L12/743 ,  G06F15/167 ,  G06F17/30 ,  H04L29/06 ,  H04L12/28 ,  G06F13/00

CPC分类号： H04L45/7457 ,  G06F15/167 ,  G06F17/30982 ,  H04L63/101

摘要： Access control lists (ACLs) include one or more rules that each define a condition and one or more actions to be performed if the condition is satisfied. In one embodiment, the conditions are stored on a ternary content-addressable memory (TCAM), which receives a portion of network traffic, such as a frame header, and compares different portions of the header to entries in the TCAM. If the frame header satisfies the condition, the TCAM reports the match to other elements in the ACL. For certain conditions, the TCAM may divide the condition into a plurality of sub-conditions which are each stored in a row of the TCAM. To efficiently use the limited space in TCAM, the networking element may include one or more comparator units which check for special-case conditions. The comparator units may be used in lieu of the TCAM to determine whether the condition is satisfied.

摘要翻译： 访问控制列表（ACL）包括一个或多个规则，每个规则定义条件和满足条件时要执行的一个或多个操作。 在一个实施例中，条件存储在三元可内容寻址存储器（TCAM）上，该内容可寻址存储器（TCAM）接收网络业务的一部分，例如帧头，并且将头部的不同部分与TCAM中的条目进行比较。 如果帧头满足条件，则TCAM报告与ACL中其他元素的匹配。 对于某些条件，TCAM可以将条件划分为多个子条件，这些子条件各自存储在一行TCAM中。 为了有效地使用TCAM中的有限空间，网络元件可以包括一个或多个比较器单元，其检查特殊情况。 可以使用比较器单元代替TCAM来确定条件是否满足。

公开(公告)号：US09215125B2

公开(公告)日：2015-12-15

申请号：US13884664

申请日：2011-12-19

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Damon Philippe ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli ,  Fabrice Jean Verplanken

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Damon Philippe ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli ,  Fabrice Jean Verplanken

IPC分类号： H04L29/06 ,  G06F9/38 ,  G06F15/163 ,  G06F9/54

CPC分类号： H04L29/0653 ,  G06F9/3877 ,  G06F9/544 ,  G06F13/385 ,  G06F15/163 ,  H04L69/22

摘要： A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=

摘要翻译： 网络处理器包括第一通信协议端口，每个端口以“S”千兆位/秒（Gbps）在“N”通道上支持“M”个最小尺寸分组数据路径业务，并且在“n”个附加车道上以不同的通信协议单元的流量“ s Gbps 第一通信协议端口支持使用位于每个第一通信协议端口中的解析逻辑来访问外部协处理器。 解析逻辑在解析周期期间被配置为在接收到“M”大小的分组时向外部协处理器发送请求并且从外部协处理器接收响应。 解析逻辑在附加通道之一上向外部协处理器发送请求最大“m”字节字，并在附加通道之一上从外部协处理器接收响应最大“m”字节字，同时遵循等式 N×S / M =