-
公开(公告)号:US20120108054A1
公开(公告)日:2012-05-03
申请号:US13093809
申请日:2011-04-25
申请人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
发明人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
IPC分类号: H01L21/768 , G03F1/68 , G03F1/00
CPC分类号: H01L21/76807 , G03F1/50 , G03F1/54 , H01L2221/1021
摘要: A method for creating a dual damascene structure while using only one lithography and masking step. Conventional dual damascene structures utilize two lithography steps: one to mask and expose the via, and a second step to mask and expose the trench interconnection. The novel method for creating a dual damascene structure allows for a smaller number of processing steps, thus reducing the processing time needed to complete the dual damascene structure. In addition, a lower number of masks may be needed. The exemplary mask or reticle used within the process incorporates different regions possessing different transmission rates. During the exposing step, light from an exposing source passes through the mask to expose a portion of the photoresist layer on top of the wafer. Depending on the transmission rate of the different regions, different thickness of the photoresist layer are exposed and later removed by a developing solution, which allows a subsequent etch process to remove portions of both the dielectric layer and photoresist layer to create a dual damascene structure.
摘要翻译: 一种用于仅使用一个光刻和掩蔽步骤来创建双镶嵌结构的方法。 传统的双镶嵌结构使用两个光刻步骤:一个用于掩蔽和暴露通孔,以及第二步骤,以掩蔽和暴露沟槽互连。 用于创建双镶嵌结构的新颖方法允许较少数量的处理步骤,从而减少完成双镶嵌结构所需的处理时间。 此外,可能需要较少数量的掩模。 在该过程中使用的示例性掩模或掩模版包含具有不同透射率的不同区域。 在曝光步骤期间,来自曝光源的光穿过掩模以暴露晶片顶部上的光致抗蚀剂层的一部分。 取决于不同区域的透射率,曝光不同厚度的光致抗蚀剂层,随后通过显影液去除,这使得随后的蚀刻工艺能够去除介电层和光致抗蚀剂层的部分以产生双镶嵌结构。
-
公开(公告)号:US08685853B2
公开(公告)日:2014-04-01
申请号:US13093809
申请日:2011-04-25
申请人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
发明人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
IPC分类号: H01L21/4763
CPC分类号: H01L21/76807 , G03F1/50 , G03F1/54 , H01L2221/1021
摘要: A method for creating a dual damascene structure while using only one lithography and masking step. Conventional dual damascene structures utilize two lithography steps: one to mask and expose the via, and a second step to mask and expose the trench interconnection. The novel method for creating a dual damascene structure allows for a smaller number of processing steps, thus reducing the processing time needed to complete the dual damascene structure. In addition, a lower number of masks may be needed. The exemplary mask or reticle used within the process incorporates different regions possessing different transmission rates. During the exposing step, light from an exposing source passes through the mask to expose a portion of the photoresist layer on top of the wafer. Depending on the transmission rate of the different regions, different thickness of the photoresist layer are exposed and later removed by a developing solution, which allows a subsequent etch process to remove portions of both the dielectric layer and photoresist layer to create a dual damascene structure.
摘要翻译: 一种用于仅使用一个光刻和掩蔽步骤来创建双镶嵌结构的方法。 传统的双镶嵌结构使用两个光刻步骤:一个用于掩蔽和暴露通孔,以及第二步骤,以掩蔽和暴露沟槽互连。 用于创建双镶嵌结构的新颖方法允许较少数量的处理步骤,从而减少完成双镶嵌结构所需的处理时间。 此外,可能需要较少数量的掩模。 在该过程中使用的示例性掩模或掩模版包含具有不同透射率的不同区域。 在曝光步骤期间,来自曝光源的光穿过掩模以暴露晶片顶部上的光致抗蚀剂层的一部分。 取决于不同区域的透射率,曝光不同厚度的光致抗蚀剂层,随后通过显影液去除,这使得随后的蚀刻工艺能够去除介电层和光致抗蚀剂层的部分以产生双镶嵌结构。
-
公开(公告)号:US07989341B2
公开(公告)日:2011-08-02
申请号:US11539614
申请日:2006-10-06
申请人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
发明人: Fan Chung Tseng , Chi Hsi Wu , Wei Ting Chien
IPC分类号: H01L21/4763
CPC分类号: H01L21/76807 , G03F1/50 , G03F1/54 , H01L2221/1021
摘要: A method for creating a dual damascene structure while using only one lithography and masking step. Conventional dual damascene structures utilize two lithography steps: one to mask and expose the via, and a second step to mask and expose the trench interconnection. The novel method for creating a dual damascene structure allows for a smaller number of processing steps, thus reducing the processing time needed to complete the dual damascene structure. In addition, a lower number of masks may be needed. The exemplary mask or reticle used within the process incorporates different regions possessing different transmission rates. During the exposing step, light from an exposing source passes through the mask to expose a portion of the photoresist layer on top of the wafer. Depending on the transmission rate of the different regions, different thickness of the photoresist layer are exposed and later removed by a developing solution, which allows a subsequent etch process to remove portions of both the dielectric layer and photoresist layer to create a dual damascene structure.
摘要翻译: 一种用于仅使用一个光刻和掩蔽步骤来创建双镶嵌结构的方法。 传统的双镶嵌结构使用两个光刻步骤:一个用于掩蔽和暴露通孔,以及第二步骤,以掩蔽和暴露沟槽互连。 用于创建双镶嵌结构的新颖方法允许较少数量的处理步骤,从而减少完成双镶嵌结构所需的处理时间。 此外,可能需要较少数量的掩模。 在该过程中使用的示例性掩模或掩模版包含具有不同透射率的不同区域。 在曝光步骤期间,来自曝光源的光穿过掩模以暴露晶片顶部上的光致抗蚀剂层的一部分。 取决于不同区域的透射率,曝光不同厚度的光致抗蚀剂层,随后通过显影液去除,这使得随后的蚀刻工艺能够去除介电层和光致抗蚀剂层的部分以产生双镶嵌结构。
-
-