公开(公告)号：US5355461A

公开(公告)日：1994-10-11

申请号：US587031

申请日：1990-09-24

申请人： Fujio Wakui ,  Masahiko Tagami

发明人： Fujio Wakui ,  Masahiko Tagami

IPC分类号： G06F12/10

CPC分类号： G06F12/109

摘要： A data processing system capable of accessing multiple virtual address spaces wherein a an access register translation is performed when obtaining an origin address (STO) of a translation table to be used for address translation of a logical address into a real address. If an access register designated by an instruction has a value equal to a predetermined value, another STO stored in a control register is used instead of the STO obtained by the access register translation. Registers are provided for storing results of detection as to whether or not each of the access registers has a value equal to the predetermined value and a sector is provided selecting either the STO in the control register or the STO obtained by the access register translation based on the stored results of detection, thus eliminating a process to discriminate the values of the access registers at each access to the virtual address spaces.

摘要翻译： 一种能够访问多个虚拟地址空间的数据处理系统，其中当获得要用于将逻辑地址转换为实际地址的地址转换的转换表的原始地址（STO）时执行访问寄存器转换。 如果由指令指定的访问寄存器具有等于预定值的值，则使用存储在控制寄存器中的另一个STO而不是通过访问寄存器转换获得的STO。 提供寄存器，用于存储每个访问寄存器是否具有等于预定值的值的检测结果，并且提供选择控制寄存器中的STO或通过访问寄存器翻译获得的STO的扇区 存储的检测结果，从而消除了在对虚拟地址空间的每次访问时区分访问寄存器的值的处理。