公开(公告)号：US20240387718A1

公开(公告)日：2024-11-21

申请号：US18320063

申请日：2023-05-18

Applicant: GAN SYSTEMS INC.

Inventor： Claudio Andres Canizares

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/20

Abstract: A heterojunction structure in which a barrier semiconductor layer is epitaxially grown on a channel semiconductor layer but varying a composition of the barrier semiconductor layer for at least part of the epitaxial growth of the barrier semiconductor layer. By so doing, in some cases, a free electron density in planar view of the 2 DEG may be increased thereby allowing for greater current flow for a given voltage difference. Furthermore, for a given current, the mobility of the electrons is increased, thus reducing the on resistance of transistors that include the 2 DEG as a channel region. This further improves power efficiency of the transistor, and reduces heat generated by the transistor at a given power.

公开(公告)号：US20240379765A1

公开(公告)日：2024-11-14

申请号：US18315398

申请日：2023-05-10

Applicant: GAN SYSTEMS INC.

Inventor： Claudio Andres Canizares

IPC: H01L29/15 ,  H01L29/20 ,  H01L29/201

Abstract: A superlattice epitaxial structure epitaxially grown on a substrate. The superlattice epitaxial structure includes epitaxial layers composing multiple layer sequences. Each of the multiple layer sequences includes a corresponding lower layer and a corresponding upper layer epitaxially grown on the corresponding lower layer. The lattice parameter of the epitaxial layers alternate lower and higher (or higher and lower) moving up through the superlattice epitaxial structure. The difference in lattice parameters in the neighboring lower and higher epitaxial layers may also vary moving up through the epitaxial structure. Thus, by varying the difference between the lattice parameters, the strain endured at that level may be engineered with the effect of increasing the electrical resistance seen vertically through the superlattice epitaxial structure, thus allowing the structure to be thinner and/or operate with higher voltages.