公开(公告)号：US10031989B2

公开(公告)日：2018-07-24

申请号：US14546065

申请日：2014-11-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ralph M. Alfano ,  Arnold E. Baizley ,  Ning Lu ,  Judith H. McCullen ,  Cole E. Zemke

IPC: G06F17/50

Abstract: Disclosed are a system and a method for integrated circuit (IC) performance modeling, wherein a design layout of an IC is analyzed to identify a first conductive shape (e.g., an internal local interconnect or contact bar shape) on a diffusion boundary shape of a semiconductor device and to also identify the first conductive shape's connectivity to any second conductive shapes (e.g., a via, via bar, or external local interconnect shapes) inside and/or outside the limits of the diffusion boundary shape. A condensed resistance model for the first conductive shape is selected from a model library based on the previously identified connectivity. The selected condensed resistance model will have a lesser number of nodes and/or resistive elements than a full resistance model for the conductive shape. The selected condensed resistance model is used to construct a condensed netlist, which is used in a combined netlist to simulate IC performance.