公开(公告)号：US09530488B1

公开(公告)日：2016-12-27

申请号：US15048583

申请日：2016-02-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： Sriram Balasubramanian ,  Vivek Joshi ,  Randy W. Mann ,  Ratheesh Ramachandran Thankalekshmi

IPC: G11C29/50 ,  G11C11/419 ,  G11C29/44

CPC classification number: G11C11/419 ,  G11C8/16 ,  G11C29/028 ,  G11C29/44 ,  G11C29/50

Abstract: At least one method, apparatus and system disclosed involves testing a dual port memory cell in a memory device. A semiconductor wafer is processed for providing a dual port memory device. An inline DC contention margin test is performed for testing a contention margin related to a write operation into a cell of the memory device. A determination is made as to whether the contention margin is within a predetermined range. A responsive action is performed in response to determining that the contention margin is outside the predetermined range.

Abstract translation: 所公开的至少一种方法，装置和系统涉及测试存储器装置中的双端口存储单元。 处理半导体晶片以提供双端口存储器件。 执行在线DC争用余量测试，用于测试与写入操作相关的争用余量到存储器件的单元中。 确定争用余额是否在预定范围内。 响应于确定争用余量在预定范围之外来执行响应动作。