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公开(公告)号:US09466651B2
公开(公告)日:2016-10-11
申请号:US14966161
申请日:2015-12-11
Applicant: GLOBALFOUNDRIES INC.
CPC classification number: H01L27/3262 , H01L21/7624 , H01L21/76254 , H01L27/1218 , H01L27/1262 , H01L27/1266 , H01L27/3248 , H01L51/5218 , H01L51/5221 , H01L51/5237 , H01L2227/323 , H01L2227/326 , H01L2251/5338
Abstract: High resolution active matrix structures are fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed using a semiconductor-on-insulator substrate. The substrate is thinned using a layer transfer technique or chemical/mechanical processing. Driver transistors are formed on the semiconductor layer of the substrate along with additional circuits that provide other functions such as computing or sensing. Contacts to passive devices such as organic light emitting diodes may be provided by heavily doped regions formed in the handle layer of the substrate and then isolated. A gate dielectric layer may be formed on the semiconductor layer, which functions as a channel layer, or the insulator layer of the substrate may be employed as a gate dielectric layer.
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公开(公告)号:US20160099297A1
公开(公告)日:2016-04-07
申请号:US14966161
申请日:2015-12-11
Applicant: GLOBALFOUNDRIES INC.
CPC classification number: H01L27/3262 , H01L21/7624 , H01L21/76254 , H01L27/1218 , H01L27/1262 , H01L27/1266 , H01L27/3248 , H01L51/5218 , H01L51/5221 , H01L51/5237 , H01L2227/323 , H01L2227/326 , H01L2251/5338
Abstract: High resolution active matrix structures are fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed using a semiconductor-on-insulator substrate. The substrate is thinned using a layer transfer technique or chemical/mechanical processing. Driver transistors are formed on the semiconductor layer of the substrate along with additional circuits that provide other functions such as computing or sensing. Contacts to passive devices such as organic light emitting diodes may be provided by heavily doped regions formed in the handle layer of the substrate and then isolated. A gate dielectric layer may be formed on the semiconductor layer, which functions as a channel layer, or the insulator layer of the substrate may be employed as a gate dielectric layer.
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