公开(公告)号：US6052127A

公开(公告)日：2000-04-18

申请号：US777556

申请日：1996-12-30

申请人： Gautam P. Vaswani ,  Michael K. Larson ,  Tom A. Dye ,  Daniel Wilde

发明人： Gautam P. Vaswani ,  Michael K. Larson ,  Tom A. Dye ,  Daniel Wilde

IPC分类号： G06T15/04 ,  G06F15/00

CPC分类号： G06T15/04

摘要： A texture value determining (TVD) circuit approximates non-homogenous 2nd order perspective texture mapping to provide texture for a polygon using linear interpolation and input parameters. The TVD circuit of the present invention includes a vertical walk subcircuit and an orthogonal walk subcircuit. The vertical walk subcircuit determines texture coordinates, u(a.sub.0,n) and v(a.sub.0,n) that represent the pixels along a vertical main slop of a triangle polygon. The orthogonal walk subcircuit determines texture coordinates, u(a.sub.m,n) and v(a.sub.m,n), for orthogonally walked polygon coordinate positions for which m>0. The orthogonally walked coordinate positions represent individual scan lines. The vertical walk subcircuit of the TVD circuit includes adders, latches, and accumulators. Each element of the vertical walk subcircuit receives a vertical main slope clock (n-clock) signal. An output of the vertical walk subsystem is computed based on the relationship,u(a.sub.0,n)=u(a.sub.0, n-1)+du.sub.main +(n-1)d.sup.2 u.sub.main for m=0, n>0where du.sub.main and d.sup.2 u.sub.main are input parameters. The orthogonal walk subcircuit also includes adders, latches, and accumulators. The orthogonal walk subcircuit is clocked by an orthogonal walk (m-clock) signal as well as the n-clock signal. An output of the orthogonal walk subcircuit is computed based on the relationship,u(a.sub.m,n)=u(a.sub.m-1, n)+n(du.sub.ortho-ADD)+du.sub.ortho +(m-1)d.sup.2 u.sub.ortho for m>0where du.sub.ortho -ADD and du.sub.ortho and d.sup.2 u.sub.ortho are input parameters.

摘要翻译： 纹理值确定（TVD）电路近似非均匀二阶透视纹理映射，以使用线性插值和输入参数为多边形提供纹理。 本发明的TVD电路包括垂直行走支路和正交行走支路。 垂直行走支路确定纹理坐标u（a0，n）和v（a0，n），它们表示沿着三角形多边形的垂直主斜面的像素。 正交步行分支电路确定m> 0的正交走行多边形坐标位置的纹理坐标u（am，n）和v（am，n）。 正交行走的坐标位置表示各个扫描线。 TVD电路的垂直行走支路包括加法器，锁存器和累加器。 垂直行走电路的每个元件都接收垂直主斜率时钟（n时钟）信号。 基于关系，u（a0，n）= u（a0，n-1）+ dumain +（n-1）d2umain为m = 0，n> 0计算垂直行走子系统的输出，其中dumain和d2umain为 输入参数。 正交走路分支电路还包括加法器，锁存器和累加器。 正交行走支路由正交步进（m-时钟）信号和n时钟信号计时。 基于对于m> 0的关系u（am，n）= u（am-1，n）+ n（duortho-ADD）+ duortho +（m-1）d2uortho）来计算正交走路子电路的输出，其中duortho -ADD和duortho和d2uortho是输入参数。