公开(公告)号：US20180330466A1

公开(公告)日：2018-11-15

申请号：US15595289

申请日：2017-05-15

Applicant: Google Inc.

Inventor： Fabrizio Basso ,  Edward Chang ,  Daniel Finchelstein ,  Timothy Knight ,  William Mark ,  Albert Meixner ,  Shahriar Rabii ,  Jason Redgrave ,  Masumi Reynders ,  Ofer Shacham ,  Don Stark ,  Michelle Tomasko

IPC: G06T1/20 ,  G06T3/40 ,  H04N5/217 ,  H04N5/232 ,  G06K9/00

CPC classification number: G06T1/20 ,  G06K9/00221 ,  G06K9/00335 ,  G06K9/00624 ,  G06T3/4015 ,  H04N5/217 ,  H04N5/23232 ,  H04N5/23267

Abstract: An image processor unit is described. The image processor unit includes a plurality of inputs to receive at least one input image. The image processor unit includes a plurality of outputs to provide at least one output image. The image processor unit includes a network coupled to the plurality of inputs and the plurality of outputs. The network is to couple at least one of the inputs to at least one of the outputs. The image processor unit includes an image processor circuit coupled to the network. The network to route an input image that is received at one of the inputs to the image processor circuit. The image processor circuit is to execute image signal processing program code to generate a processed output image from the input image. The network is to route the processed output image to at least one of the outputs.

公开(公告)号：US09343377B1

公开(公告)日：2016-05-17

申请号：US14592249

申请日：2015-01-08

Applicant: Google Inc.

Inventor： Andy Yang ,  Benjamin Iver Gribstad ,  Don Stark ,  Shahriar Rabii ,  Srenik Mehta

IPC: H01L21/66 ,  H01L21/82 ,  H01L21/768

CPC classification number: H01L21/76892 ,  G01R31/31719 ,  H01L22/14 ,  H01L22/20

Abstract: A method includes forming an integrated circuit device having device circuitry disposed in a device circuitry area on a substrate and a destroyable circuit formed in a destroyable circuitry area on the substrate; testing at least one operational aspect of the device circuitry using the destroyable circuit; and destroying the destroyable circuit subsequent to testing the at least one operational aspect of the device circuitry.

Abstract translation: 一种方法包括形成集成电路装置，其具有设置在衬底上的器件电路区域中的器件电路和形成在衬底上的可破坏电路区域中的可破坏电路; 使用可破坏电路测试设备电路的至少一个操作方面; 以及在测试所述设备电路的至少一个操作方面之后破坏所述可破坏的电路。