CASCADE PROTOCOL FOR iSWAP GATE IN A TWO-QUBIT SYSTEM

    公开(公告)号:US20210272001A1

    公开(公告)日:2021-09-02

    申请号:US16981075

    申请日:2019-01-31

    申请人: Google LLC

    IPC分类号: G06N10/00

    摘要: Methods, systems and apparatus for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a method includes implementing a cascade schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit. Implementing the cascade schedule includes: during a first stage, adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel; during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel; during a third stage, evolving the first qubit and second qubit; during a fourth stage, implementing the second stage in reverse order; and during a fifth stage, implementing the first stage in reverse order.

    Non-adiabatic implementation of an iSWAP quantum logic gate

    公开(公告)号:US12124922B2

    公开(公告)日:2024-10-22

    申请号:US17433445

    申请日:2019-03-05

    申请人: Google LLC

    IPC分类号: G06N10/00

    CPC分类号: G06N10/00

    摘要: Methods, systems and apparatus for generating plunge schedules for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a plunge schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit includes, during a first stage, non-adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel, during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel. during a third stage, allowing the first qubit and the second qubit to freely evolve and interact, during a fourth stage, implementing the second stage in reverse order, and during a fifth stage, implementing the first stage in reverse order.

    Cascade protocol for iSWAP gate in a two-qubit system

    公开(公告)号:US12067457B2

    公开(公告)日:2024-08-20

    申请号:US16981075

    申请日:2019-01-31

    申请人: Google LLC

    CPC分类号: G06N10/00 G06N10/20 G06N10/60

    摘要: Methods, systems and apparatus for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a method includes implementing a cascade schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit. Implementing the cascade schedule includes: during a first stage, adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel; during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel; during a third stage, evolving the first qubit and second qubit; during a fourth stage, implementing the second stage in reverse order; and during a fifth stage, implementing the first stage in reverse order.

    NON-ADIABATIC IMPLEMENTATION OF AN ISWAP QUANTUM LOGIC GATE

    公开(公告)号:US20220027773A1

    公开(公告)日:2022-01-27

    申请号:US17433445

    申请日:2019-03-05

    申请人: Google LLC

    IPC分类号: G06N10/00

    摘要: Methods, systems and apparatus for generating plunge schedules for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a plunge schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit includes, during a first stage, non-adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel, during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel. during a third stage, allowing the first qubit and the second qubit to freely evolve and interact, during a fourth stage, implementing the second stage in reverse order, and during a fifth stage, implementing the first stage in reverse order.