Arithmetic Circuit Design and Evaluation Using Backward Error Analysis

    公开(公告)号:US20250124199A1

    公开(公告)日:2025-04-17

    申请号:US18379962

    申请日:2023-10-13

    Applicant: Google LLC

    Abstract: Designing a circuit to perform a floating point arithmetic operation by identifying a multiple of parameters that characterize circuits for performing the floating point arithmetic operation and an equation relating the plurality of parameters to a maximum relative backward error parameter, the circuits respectively corresponding to combinations of values for the parameters; specifying a target maximum relative backward error for the floating point arithmetic operation; computing a maximum relative backward error for each of one or more of the combinations of values based on the equation; and when the maximum relative backward error for a respective combination of values is less than the target maximum relative backward error, identifying the circuit corresponding to the maximum relative backward error as a circuit operable to perform the floating point arithmetic operation at a desirable output accuracy.

Patent Agency Ranking