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公开(公告)号:US12282853B2
公开(公告)日:2025-04-22
申请号:US18582294
申请日:2024-02-20
Applicant: Google LLC
Inventor: Rahul Nagarajan , Lifeng Nai , George Kurian , Hema Hariharan
Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing neural network computations using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs.
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公开(公告)号:US11948086B2
公开(公告)日:2024-04-02
申请号:US18305297
申请日:2023-04-21
Applicant: Google LLC
Inventor: Rahul Nagarajan , Lifeng Nai , George Kurian , Hema Hariharan
Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing neural network computations using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs.
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公开(公告)号:US11651209B1
公开(公告)日:2023-05-16
申请号:US16659527
申请日:2019-10-21
Applicant: Google LLC
Inventor: Rahul Nagarajan , Lifeng Nai , George Kurian , Hema Hariharan
Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing neural network computations using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs.
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公开(公告)号:US20250028956A1
公开(公告)日:2025-01-23
申请号:US18905313
申请日:2024-10-03
Applicant: Google LLC
Inventor: Jeremiah Willcock , George Kurian
IPC: G06N3/08 , G06F16/901 , G06F18/213 , G06F18/214 , G06N3/084
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using dynamic minibatch sizes during neural network training. One of the methods includes receiving, by each of a plurality of host computer, a respective batch of training examples, each training example having zero or more features, computing, by each host computer, a minimum number of minibatches into which the host computer can divide the respective batch of training examples so that the host computer can process each minibatch using an embedding layer of the neural network without exceeding available computing resources, determining a largest minimum number of minibatches (N) into which any host computer can divide its respective batch of training examples, generating, by each host computer, N minibatches from the respective batch of training examples received by the host computer, and processing, by each host computer, the N minibatches using the embedding layer.
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公开(公告)号:US10789510B2
公开(公告)日:2020-09-29
申请号:US16246371
申请日:2019-01-11
Applicant: Google LLC
Inventor: Jeremiah Willcock , George Kurian
IPC: G06K9/62 , G06N3/08 , G06F16/901
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using dynamic minibatch sizes during neural network training. One of the methods includes receiving, by each of a plurality of host computer, a respective batch of training examples, each training example having zero or more features, computing, by each host computer, a minimum number of minibatches into which the host computer can divide the respective batch of training examples so that the host computer can process each minibatch using an embedding layer of the neural network without exceeding available computing resources, determining a largest minimum number of minibatches (N) into which any host computer can divide its respective batch of training examples, generating, by each host computer, N minibatches from the respective batch of training examples received by the host computer, and processing, by each host computer, the N minibatches using the embedding layer.
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公开(公告)号:US20210019570A1
公开(公告)日:2021-01-21
申请号:US17034338
申请日:2020-09-28
Applicant: Google LLC
Inventor: Jeremiah Willcock , George Kurian
IPC: G06K9/62 , G06F16/901 , G06N3/08
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using dynamic minibatch sizes during neural network training. One of the methods includes receiving, by each of a plurality of host computer, a respective batch of training examples, each training example having zero or more features, computing, by each host computer, a minimum number of minibatches into which the host computer can divide the respective batch of training examples so that the host computer can process each minibatch using an embedding layer of the neural network without exceeding available computing resources, determining a largest minimum number of minibatches (N) into which any host computer can divide its respective batch of training examples, generating, by each host computer, N minibatches from the respective batch of training examples received by the host computer, and processing, by each host computer, the N minibatches using the embedding layer.
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公开(公告)号:US20200226424A1
公开(公告)日:2020-07-16
申请号:US16246371
申请日:2019-01-11
Applicant: Google LLC
Inventor: Jeremiah Willcock , George Kurian
IPC: G06K9/62 , G06F16/901 , G06N3/08
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using dynamic minibatch sizes during neural network training. One of the methods includes receiving, by each of a plurality of host computer, a respective batch of training examples, each training example having zero or more features, computing, by each host computer, a minimum number of minibatches into which the host computer can divide the respective batch of training examples so that the host computer can process each minibatch using an embedding layer of the neural network without exceeding available computing resources, determining a largest minimum number of minibatches (N) into which any host computer can divide its respective batch of training examples, generating, by each host computer, N minibatches from the respective batch of training examples received by the host computer, and processing, by each host computer, the N minibatches using the embedding layer.
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公开(公告)号:US12131255B2
公开(公告)日:2024-10-29
申请号:US17034338
申请日:2020-09-28
Applicant: Google LLC
Inventor: Jeremiah Willcock , George Kurian
IPC: G06N3/08 , G06F16/901 , G06F18/213 , G06F18/214 , G06N3/084
CPC classification number: G06N3/08 , G06F16/9017 , G06F18/213 , G06F18/2148 , G06N3/084
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using dynamic minibatch sizes during neural network training. One of the methods includes receiving, by each of a plurality of host computer, a respective batch of training examples, each training example having zero or more features, computing, by each host computer, a minimum number of minibatches into which the host computer can divide the respective batch of training examples so that the host computer can process each minibatch using an embedding layer of the neural network without exceeding available computing resources, determining a largest minimum number of minibatches (N) into which any host computer can divide its respective batch of training examples, generating, by each host computer, N minibatches from the respective batch of training examples received by the host computer, and processing, by each host computer, the N minibatches using the embedding layer.
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公开(公告)号:US20240273363A1
公开(公告)日:2024-08-15
申请号:US18582294
申请日:2024-02-20
Applicant: Google LLC
Inventor: Rahul Nagarajan , Lifeng Nai , George Kurian , Hema Hariharan
Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing neural network computations using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs.
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公开(公告)号:US20230376759A1
公开(公告)日:2023-11-23
申请号:US18305297
申请日:2023-04-21
Applicant: Google LLC
Inventor: Rahul Nagarajan , Lifeng Nai , George Kurian , Hema Hariharan
Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing neural network computations using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs.
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