公开(公告)号：US20140203375A1

公开(公告)日：2014-07-24

申请号：US14250519

申请日：2014-04-11

申请人： HARRY HAK-LAY CHUANG ,  MING ZHU ,  LEE-WEE TEO

发明人： HARRY HAK-LAY CHUANG ,  MING ZHU ,  LEE-WEE TEO

IPC分类号： H01L27/06

CPC分类号： H01L27/0617 ,  H01L23/5227 ,  H01L27/0207 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides reduced substrate coupling for inductors in semiconductor devices. A method of fabricating a semiconductor device having reduced substrate coupling includes providing a substrate having a first region and a second region. The method also includes forming a first gate structure over the first region and a second gate structure over the second region, wherein the first and second gate structures each include a dummy gate. The method next includes forming an inter layer dielectric (ILD) over the substrate and forming a photoresist (PR) layer over the second gate structure. Then, the method includes removing the dummy gate from the first gate structure, thereby forming a trench and forming a metal gate in the trench so that a transistor may be formed in the first region, which includes a metal gate, and an inductor component may be formed over the second region, which does not include a metal gate.

摘要翻译： 本公开为半导体器件中的电感器提供了减少的衬底耦合。 制造具有减小的衬底耦合的半导体器件的方法包括提供具有第一区域和第二区域的衬底。 该方法还包括在第一区域上形成第一栅极结构，在第二区域上形成第二栅极结构，其中第一和第二栅极结构各自包括虚拟栅极。 该方法接下来包括在衬底上形成层间电介质（ILD），并在第二栅极结构上形成光刻胶（PR）层。 然后，该方法包括从第一栅极结构中去除伪栅极，由此形成沟槽并在沟槽中形成金属栅极，使得晶体管可以形成在包括金属栅极的第一区域中，并且电感器元件可以 形成在不包括金属栅极的第二区域上。