公开(公告)号：US20180367444A1

公开(公告)日：2018-12-20

申请号：US15626983

申请日：2017-06-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Derek Alan Sherlock ,  Gary Gostin ,  Nicholas George McDonald ,  Alan Davis ,  Darel N. Emmot ,  John Kim

IPC: H04L12/733 ,  H04L12/26

CPC classification number: H04L45/20 ,  H04L43/0864 ,  H04L43/106 ,  H04L45/26 ,  H04L47/286 ,  H04L47/32 ,  H04L67/325

Abstract: Example implementations relate to calculating a time to live (TTL). An example implementation includes receiving a transaction request containing a first time to live (TTL) from a requester. A second TTL for a transaction response may be computed, and a transaction response containing the second TTL may be transmitted.

公开(公告)号：US20210258252A1

公开(公告)日：2021-08-19

申请号：US17247473

申请日：2020-12-11

Applicant: Hewlett Packard Enterprise Development LP

Inventor： David Olson ,  Darel Neal Emmot ,  Nicholas George McDonald ,  John Kim

IPC: H04L12/721 ,  H04L12/707 ,  H04L12/717 ,  H04L12/873 ,  H04L12/803 ,  H04L12/801

Abstract: A switch includes a plurality of ingress ports, a plurality of egress ports, and a plurality of buffers comprising a buffer coupled to each ingress port, egress port pair. An ingress port is to determine a plurality of potential egress ports for a packet. The ingress port is to select an egress port of the plurality of potential egress ports based on congestion of the corresponding buffers coupled to the ingress port and to each of the plurality of potential egress ports. The ingress port is to place the packet into the corresponding buffer coupled to the ingress port and the selected egress port.

公开(公告)号：US11722406B2

公开(公告)日：2023-08-08

申请号：US17247473

申请日：2020-12-11

Applicant: Hewlett Packard Enterprise Development LP

Inventor： David Olson ,  Darel Neal Emmot ,  Nicholas George McDonald ,  John Kim

IPC: H04L45/00 ,  H04L45/24 ,  H04L47/10 ,  H04L47/52 ,  H04L47/122 ,  H04L45/42

CPC classification number: H04L45/38 ,  H04L45/24 ,  H04L45/42 ,  H04L47/122 ,  H04L47/29 ,  H04L47/52

Abstract: A switch includes a plurality of ingress ports, a plurality of egress ports, and a plurality of buffers comprising a buffer coupled to each ingress port, egress port pair. An ingress port is to determine a plurality of potential egress ports for a packet. The ingress port is to select an egress port of the plurality of potential egress ports based on congestion of the corresponding buffers coupled to the ingress port and to each of the plurality of potential egress ports. The ingress port is to place the packet into the corresponding buffer coupled to the ingress port and the selected egress port.

公开(公告)号：US10355978B2

公开(公告)日：2019-07-16

申请号：US15626983

申请日：2017-06-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Derek Alan Sherlock ,  Gary Gostin ,  Nicholas George McDonald ,  Alan Davis ,  Darel N. Emmot ,  John Kim

IPC: H04L12/26 ,  H04L12/823 ,  H04L12/841 ,  H04L12/733 ,  H04L12/721 ,  H04L29/08

Abstract: Example implementations relate to calculating a time to live (TTL). An example implementation includes receiving a transaction request containing a first time to live (TTL) from a requester. A second TTL for a transaction response may be computed, and a transaction response containing the second TTL may be transmitted.