ADAPTABLE REDRIVER DESIGN ON DRIVE BACKPLANE WITH UNIVERSAL BACKPLANE MANAGEMENT CONTROLLER

    公开(公告)号:US20240393948A1

    公开(公告)日:2024-11-28

    申请号:US18200993

    申请日:2023-05-23

    Abstract: A system and method are provided to detect an event corresponding to the system powering up or a storage device being inserted into the backplane. In response to detecting the event, the system obtains configuration information associated with a physical topology of the backplane, the configuration information associated with: a first bus between a storage controller and a redriver; a second bus between the redriver and the storage device; the backplane; and the storage device. The system searches, in a data structure based on the configuration information, for an optimized redriver setting. The system activates, based on the optimized setting, the redriver by enhancing signals sent via the second bus to the storage device and by enhancing signals sent via the first bus to the storage controller, thereby facilitating enhancement of signal integrity between the storage components in the backplane.

    Adaptable redriver design on drive backplane with universal backplane management controller

    公开(公告)号:US12277318B2

    公开(公告)日:2025-04-15

    申请号:US18200993

    申请日:2023-05-23

    Abstract: A system and method are provided to detect an event corresponding to the system powering up or a storage device being inserted into the backplane. In response to detecting the event, the system obtains configuration information associated with a physical topology of the backplane, the configuration information associated with: a first bus between a storage controller and a redriver; a second bus between the redriver and the storage device; the backplane; and the storage device. The system searches, in a data structure based on the configuration information, for an optimized redriver setting. The system activates, based on the optimized setting, the redriver by enhancing signals sent via the second bus to the storage device and by enhancing signals sent via the first bus to the storage controller, thereby facilitating enhancement of signal integrity between the storage components in the backplane.

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