Systems and methods for executing forward error correction coding

    公开(公告)号:US11968039B2

    公开(公告)日:2024-04-23

    申请号:US17895691

    申请日:2022-08-25

    CPC classification number: H04L1/0052 H04L1/0071

    Abstract: There is provided methods and processors for executing Forward Error Correction (FEC) coding. The method includes acquiring a stream of real data symbols from a communication medium. The stream of real data symbols being arranged in a real matrix. The method includes generating virtual data symbols being arranged in a virtual matrix. The generating includes applying an interleaver map onto the matrix such that (i) at most c number of virtual data symbols in a given virtual row of the virtual matrix are copies of (ii) real data symbols associated with a same real row of the real matrix, c being a positive integer higher than 1. The method includes decoding codewords formed by the virtual matrix and the matrix.

    Multidimensional multilevel coding encoder and decoder

    公开(公告)号:US11621726B1

    公开(公告)日:2023-04-04

    申请号:US17471765

    申请日:2021-09-10

    Abstract: A multidimensional multilevel coding (MLC) encoder comprises a soft forward error correction (FEC) encoder receiving first bits for generating soft FEC encoded bits, a redundancy generator receiving a subset of the soft FEC encoded bits for generating redundant bits, and a hard FEC encoder receiving second bits for generating hard FEC encoded bits. Combinations of the soft FEC encoded bits, the redundant bits, and the hard FEC encoded bits form labels for mapping to a plurality of constellation points. A MLC decoder comprises a redundancy decoder, a soft FEC decoder and a hard FEC decoder. The redundancy decoder combines log-likelihood-ratios (LLR) of soft FEC encoded bits received from the MLC encoder to allow the soft FEC decoder to produce decoded bits. Decoding of hard FEC encoded bits by the hard FEC decoder is conditioned on values of the bits decoded by the soft FEC decoder.

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