公开(公告)号：US20240006330A1

公开(公告)日：2024-01-04

申请号：US18469355

申请日：2023-09-18

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Juergen HOEGERL ,  Ruoyang Du ,  Huibin Chen

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L25/0655 ,  H01L23/49537 ,  H01L23/3107 ,  H01L24/40 ,  H01L2224/40225

Abstract: The present disclosure relates to a semiconductor arrangement, comprising: a substrate; a first group of semiconductor elements forming a first switch; a second group of semiconductor elements forming a second switch. The substrate comprises: a first electrically conductive area; a second electrically conductive area; a third electrically conductive area; a fourth electrically conductive area. The semiconductor arrangement further comprises: a first electrical connection line; a second electrical connection line; and a third electrical connection line. The first electrical connection line, the second electrical connection line, the third electrical connection line and the fourth area of the substrate are dimensioned according to a symmetry criterion to enable a simultaneous current flow through the load paths of the semiconductor elements of the first group as well as a simultaneous current flow through the load paths of the semiconductor elements of the second group.